FFmpeg
nvenc.c
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1 /*
2  * H.264/HEVC/AV1 hardware encoding using nvidia nvenc
3  * Copyright (c) 2016 Timo Rothenpieler <timo@rothenpieler.org>
4  *
5  * This file is part of FFmpeg.
6  *
7  * FFmpeg is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU Lesser General Public
9  * License as published by the Free Software Foundation; either
10  * version 2.1 of the License, or (at your option) any later version.
11  *
12  * FFmpeg is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15  * Lesser General Public License for more details.
16  *
17  * You should have received a copy of the GNU Lesser General Public
18  * License along with FFmpeg; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
20  */
21 
22 #include "config.h"
23 #include "config_components.h"
24 
25 #include "nvenc.h"
26 #include "hevc/sei.h"
27 #if CONFIG_AV1_NVENC_ENCODER
28 #include "av1.h"
29 #endif
30 
32 #include "libavutil/hwcontext.h"
33 #include "libavutil/cuda_check.h"
34 #include "libavutil/imgutils.h"
35 #include "libavutil/mem.h"
36 #include "libavutil/pixdesc.h"
37 #include "libavutil/mathematics.h"
38 #include "atsc_a53.h"
39 #include "codec_desc.h"
40 #include "encode.h"
41 #include "internal.h"
42 #include "packet_internal.h"
43 
44 #define CHECK_CU(x) FF_CUDA_CHECK_DL(avctx, dl_fn->cuda_dl, x)
45 
46 #define NVENC_CAP 0x30
47 
48 #ifndef NVENC_NO_DEPRECATED_RC
49 #define IS_CBR(rc) (rc == NV_ENC_PARAMS_RC_CBR || \
50  rc == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ || \
51  rc == NV_ENC_PARAMS_RC_CBR_HQ)
52 #else
53 #define IS_CBR(rc) (rc == NV_ENC_PARAMS_RC_CBR)
54 #endif
55 
61  AV_PIX_FMT_P016, // Truncated to 10bits
62  AV_PIX_FMT_YUV444P16, // Truncated to 10bits
70  AV_PIX_FMT_GBRP16, // Truncated to 10bits
72 #if CONFIG_D3D11VA
74 #endif
76 };
77 
79  HW_CONFIG_ENCODER_FRAMES(CUDA, CUDA),
81 #if CONFIG_D3D11VA
82  HW_CONFIG_ENCODER_FRAMES(D3D11, D3D11VA),
84 #endif
85  NULL,
86 };
87 
88 #define IS_10BIT(pix_fmt) (pix_fmt == AV_PIX_FMT_P010 || \
89  pix_fmt == AV_PIX_FMT_P016 || \
90  pix_fmt == AV_PIX_FMT_YUV444P16 || \
91  pix_fmt == AV_PIX_FMT_X2RGB10 || \
92  pix_fmt == AV_PIX_FMT_X2BGR10 || \
93  pix_fmt == AV_PIX_FMT_GBRP16)
94 
95 #define IS_RGB(pix_fmt) (pix_fmt == AV_PIX_FMT_0RGB32 || \
96  pix_fmt == AV_PIX_FMT_RGB32 || \
97  pix_fmt == AV_PIX_FMT_0BGR32 || \
98  pix_fmt == AV_PIX_FMT_BGR32 || \
99  pix_fmt == AV_PIX_FMT_X2RGB10 || \
100  pix_fmt == AV_PIX_FMT_X2BGR10)
101 
102 #define IS_YUV444(pix_fmt) (pix_fmt == AV_PIX_FMT_YUV444P || \
103  pix_fmt == AV_PIX_FMT_YUV444P16 || \
104  pix_fmt == AV_PIX_FMT_GBRP || \
105  pix_fmt == AV_PIX_FMT_GBRP16 || \
106  (ctx->rgb_mode == NVENC_RGB_MODE_444 && IS_RGB(pix_fmt)))
107 
108 #define IS_GBRP(pix_fmt) (pix_fmt == AV_PIX_FMT_GBRP || \
109  pix_fmt == AV_PIX_FMT_GBRP16)
110 
111 static const struct {
112  NVENCSTATUS nverr;
113  int averr;
114  const char *desc;
115 } nvenc_errors[] = {
116  { NV_ENC_SUCCESS, 0, "success" },
117  { NV_ENC_ERR_NO_ENCODE_DEVICE, AVERROR(ENOENT), "no encode device" },
118  { NV_ENC_ERR_UNSUPPORTED_DEVICE, AVERROR(ENOSYS), "unsupported device" },
119  { NV_ENC_ERR_INVALID_ENCODERDEVICE, AVERROR(EINVAL), "invalid encoder device" },
120  { NV_ENC_ERR_INVALID_DEVICE, AVERROR(EINVAL), "invalid device" },
121  { NV_ENC_ERR_DEVICE_NOT_EXIST, AVERROR(EIO), "device does not exist" },
122  { NV_ENC_ERR_INVALID_PTR, AVERROR(EFAULT), "invalid ptr" },
123  { NV_ENC_ERR_INVALID_EVENT, AVERROR(EINVAL), "invalid event" },
124  { NV_ENC_ERR_INVALID_PARAM, AVERROR(EINVAL), "invalid param" },
125  { NV_ENC_ERR_INVALID_CALL, AVERROR(EINVAL), "invalid call" },
126  { NV_ENC_ERR_OUT_OF_MEMORY, AVERROR(ENOMEM), "out of memory" },
127  { NV_ENC_ERR_ENCODER_NOT_INITIALIZED, AVERROR(EINVAL), "encoder not initialized" },
128  { NV_ENC_ERR_UNSUPPORTED_PARAM, AVERROR(ENOSYS), "unsupported param" },
129  { NV_ENC_ERR_LOCK_BUSY, AVERROR(EAGAIN), "lock busy" },
130  { NV_ENC_ERR_NOT_ENOUGH_BUFFER, AVERROR_BUFFER_TOO_SMALL, "not enough buffer"},
131  { NV_ENC_ERR_INVALID_VERSION, AVERROR(EINVAL), "invalid version" },
132  { NV_ENC_ERR_MAP_FAILED, AVERROR(EIO), "map failed" },
133  { NV_ENC_ERR_NEED_MORE_INPUT, AVERROR(EAGAIN), "need more input" },
134  { NV_ENC_ERR_ENCODER_BUSY, AVERROR(EAGAIN), "encoder busy" },
135  { NV_ENC_ERR_EVENT_NOT_REGISTERD, AVERROR(EBADF), "event not registered" },
136  { NV_ENC_ERR_GENERIC, AVERROR_UNKNOWN, "generic error" },
137  { NV_ENC_ERR_INCOMPATIBLE_CLIENT_KEY, AVERROR(EINVAL), "incompatible client key" },
138  { NV_ENC_ERR_UNIMPLEMENTED, AVERROR(ENOSYS), "unimplemented" },
139  { NV_ENC_ERR_RESOURCE_REGISTER_FAILED, AVERROR(EIO), "resource register failed" },
140  { NV_ENC_ERR_RESOURCE_NOT_REGISTERED, AVERROR(EBADF), "resource not registered" },
141  { NV_ENC_ERR_RESOURCE_NOT_MAPPED, AVERROR(EBADF), "resource not mapped" },
142 };
143 
144 static int nvenc_map_error(NVENCSTATUS err, const char **desc)
145 {
146  int i;
147  for (i = 0; i < FF_ARRAY_ELEMS(nvenc_errors); i++) {
148  if (nvenc_errors[i].nverr == err) {
149  if (desc)
150  *desc = nvenc_errors[i].desc;
151  return nvenc_errors[i].averr;
152  }
153  }
154  if (desc)
155  *desc = "unknown error";
156  return AVERROR_UNKNOWN;
157 }
158 
159 static int nvenc_print_error(AVCodecContext *avctx, NVENCSTATUS err,
160  const char *error_string)
161 {
162  const char *desc;
163  const char *details = "(no details)";
164  int ret = nvenc_map_error(err, &desc);
165 
166 #ifdef NVENC_HAVE_GETLASTERRORSTRING
167  NvencContext *ctx = avctx->priv_data;
168  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
169 
170  if (p_nvenc && ctx->nvencoder)
171  details = p_nvenc->nvEncGetLastErrorString(ctx->nvencoder);
172 #endif
173 
174  av_log(avctx, AV_LOG_ERROR, "%s: %s (%d): %s\n", error_string, desc, err, details);
175 
176  return ret;
177 }
178 
179 typedef struct GUIDTuple {
180  const GUID guid;
181  int flags;
182 } GUIDTuple;
183 
184 #define PRESET_ALIAS(alias, name, ...) \
185  [PRESET_ ## alias] = { NV_ENC_PRESET_ ## name ## _GUID, __VA_ARGS__ }
186 
187 #define PRESET(name, ...) PRESET_ALIAS(name, name, __VA_ARGS__)
188 
190 {
191  GUIDTuple presets[] = {
192 #ifdef NVENC_HAVE_NEW_PRESETS
193  PRESET(P1),
194  PRESET(P2),
195  PRESET(P3),
196  PRESET(P4),
197  PRESET(P5),
198  PRESET(P6),
199  PRESET(P7),
201  PRESET_ALIAS(MEDIUM, P4, NVENC_ONE_PASS),
203  // Compat aliases
208  PRESET_ALIAS(LOW_LATENCY_DEFAULT, P4, NVENC_DEPRECATED_PRESET | NVENC_LOWLATENCY),
213 #else
214  PRESET(DEFAULT),
215  PRESET(HP),
216  PRESET(HQ),
217  PRESET(BD),
218  PRESET_ALIAS(SLOW, HQ, NVENC_TWO_PASSES),
219  PRESET_ALIAS(MEDIUM, HQ, NVENC_ONE_PASS),
221  PRESET(LOW_LATENCY_DEFAULT, NVENC_LOWLATENCY),
222  PRESET(LOW_LATENCY_HP, NVENC_LOWLATENCY),
223  PRESET(LOW_LATENCY_HQ, NVENC_LOWLATENCY),
224  PRESET(LOSSLESS_DEFAULT, NVENC_LOSSLESS),
225  PRESET(LOSSLESS_HP, NVENC_LOSSLESS),
226 #endif
227  };
228 
229  GUIDTuple *t = &presets[ctx->preset];
230 
231  ctx->init_encode_params.presetGUID = t->guid;
232  ctx->flags = t->flags;
233 
234 #ifdef NVENC_HAVE_NEW_PRESETS
235  if (ctx->tuning_info == NV_ENC_TUNING_INFO_LOSSLESS)
237 #endif
238 }
239 
240 #undef PRESET
241 #undef PRESET_ALIAS
242 
244 {
245 #if NVENCAPI_CHECK_VERSION(12, 3)
246  const char *minver = "(unknown)";
247 #elif NVENCAPI_CHECK_VERSION(12, 2)
248 # if defined(_WIN32) || defined(__CYGWIN__)
249  const char *minver = "551.76";
250 # else
251  const char *minver = "550.54.14";
252 # endif
253 #elif NVENCAPI_CHECK_VERSION(12, 1)
254 # if defined(_WIN32) || defined(__CYGWIN__)
255  const char *minver = "531.61";
256 # else
257  const char *minver = "530.41.03";
258 # endif
259 #elif NVENCAPI_CHECK_VERSION(12, 0)
260 # if defined(_WIN32) || defined(__CYGWIN__)
261  const char *minver = "522.25";
262 # else
263  const char *minver = "520.56.06";
264 # endif
265 #elif NVENCAPI_CHECK_VERSION(11, 1)
266 # if defined(_WIN32) || defined(__CYGWIN__)
267  const char *minver = "471.41";
268 # else
269  const char *minver = "470.57.02";
270 # endif
271 #elif NVENCAPI_CHECK_VERSION(11, 0)
272 # if defined(_WIN32) || defined(__CYGWIN__)
273  const char *minver = "456.71";
274 # else
275  const char *minver = "455.28";
276 # endif
277 #elif NVENCAPI_CHECK_VERSION(10, 0)
278 # if defined(_WIN32) || defined(__CYGWIN__)
279  const char *minver = "450.51";
280 # else
281  const char *minver = "445.87";
282 # endif
283 #elif NVENCAPI_CHECK_VERSION(9, 1)
284 # if defined(_WIN32) || defined(__CYGWIN__)
285  const char *minver = "436.15";
286 # else
287  const char *minver = "435.21";
288 # endif
289 #elif NVENCAPI_CHECK_VERSION(9, 0)
290 # if defined(_WIN32) || defined(__CYGWIN__)
291  const char *minver = "418.81";
292 # else
293  const char *minver = "418.30";
294 # endif
295 #elif NVENCAPI_CHECK_VERSION(8, 2)
296 # if defined(_WIN32) || defined(__CYGWIN__)
297  const char *minver = "397.93";
298 # else
299  const char *minver = "396.24";
300 #endif
301 #elif NVENCAPI_CHECK_VERSION(8, 1)
302 # if defined(_WIN32) || defined(__CYGWIN__)
303  const char *minver = "390.77";
304 # else
305  const char *minver = "390.25";
306 # endif
307 #else
308 # if defined(_WIN32) || defined(__CYGWIN__)
309  const char *minver = "378.66";
310 # else
311  const char *minver = "378.13";
312 # endif
313 #endif
314  av_log(avctx, level, "The minimum required Nvidia driver for nvenc is %s or newer\n", minver);
315 }
316 
318 {
319  NvencContext *ctx = avctx->priv_data;
320  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
321  NVENCSTATUS err;
322  uint32_t nvenc_max_ver;
323  int ret;
324 
325  ret = cuda_load_functions(&dl_fn->cuda_dl, avctx);
326  if (ret < 0)
327  return ret;
328 
329  ret = nvenc_load_functions(&dl_fn->nvenc_dl, avctx);
330  if (ret < 0) {
332  return ret;
333  }
334 
335  err = dl_fn->nvenc_dl->NvEncodeAPIGetMaxSupportedVersion(&nvenc_max_ver);
336  if (err != NV_ENC_SUCCESS)
337  return nvenc_print_error(avctx, err, "Failed to query nvenc max version");
338 
339  av_log(avctx, AV_LOG_VERBOSE, "Loaded Nvenc version %d.%d\n", nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
340 
341  if ((NVENCAPI_MAJOR_VERSION << 4 | NVENCAPI_MINOR_VERSION) > nvenc_max_ver) {
342  av_log(avctx, AV_LOG_ERROR, "Driver does not support the required nvenc API version. "
343  "Required: %d.%d Found: %d.%d\n",
344  NVENCAPI_MAJOR_VERSION, NVENCAPI_MINOR_VERSION,
345  nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
347  return AVERROR(ENOSYS);
348  }
349 
350  dl_fn->nvenc_funcs.version = NV_ENCODE_API_FUNCTION_LIST_VER;
351 
352  err = dl_fn->nvenc_dl->NvEncodeAPICreateInstance(&dl_fn->nvenc_funcs);
353  if (err != NV_ENC_SUCCESS)
354  return nvenc_print_error(avctx, err, "Failed to create nvenc instance");
355 
356  av_log(avctx, AV_LOG_VERBOSE, "Nvenc initialized successfully\n");
357 
358  return 0;
359 }
360 
362 {
363  NvencContext *ctx = avctx->priv_data;
364  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
365 
366  if (ctx->d3d11_device)
367  return 0;
368 
369  return CHECK_CU(dl_fn->cuda_dl->cuCtxPushCurrent(ctx->cu_context));
370 }
371 
373 {
374  NvencContext *ctx = avctx->priv_data;
375  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
376  CUcontext dummy;
377 
378  if (ctx->d3d11_device)
379  return 0;
380 
381  return CHECK_CU(dl_fn->cuda_dl->cuCtxPopCurrent(&dummy));
382 }
383 
385 {
386  NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS params = { 0 };
387  NvencContext *ctx = avctx->priv_data;
388  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
389  NVENCSTATUS ret;
390 
391  params.version = NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS_VER;
392  params.apiVersion = NVENCAPI_VERSION;
393  if (ctx->d3d11_device) {
394  params.device = ctx->d3d11_device;
395  params.deviceType = NV_ENC_DEVICE_TYPE_DIRECTX;
396  } else {
397  params.device = ctx->cu_context;
398  params.deviceType = NV_ENC_DEVICE_TYPE_CUDA;
399  }
400 
401  ret = p_nvenc->nvEncOpenEncodeSessionEx(&params, &ctx->nvencoder);
402  if (ret != NV_ENC_SUCCESS) {
403  ctx->nvencoder = NULL;
404  return nvenc_print_error(avctx, ret, "OpenEncodeSessionEx failed");
405  }
406 
407  return 0;
408 }
409 
411 {
412  NvencContext *ctx = avctx->priv_data;
413  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
414  int i, ret, count = 0;
415  GUID *guids = NULL;
416 
417  ret = p_nvenc->nvEncGetEncodeGUIDCount(ctx->nvencoder, &count);
418 
419  if (ret != NV_ENC_SUCCESS || !count)
420  return AVERROR(ENOSYS);
421 
422  guids = av_malloc(count * sizeof(GUID));
423  if (!guids)
424  return AVERROR(ENOMEM);
425 
426  ret = p_nvenc->nvEncGetEncodeGUIDs(ctx->nvencoder, guids, count, &count);
427  if (ret != NV_ENC_SUCCESS) {
428  ret = AVERROR(ENOSYS);
429  goto fail;
430  }
431 
432  ret = AVERROR(ENOSYS);
433  for (i = 0; i < count; i++) {
434  if (!memcmp(&guids[i], &ctx->init_encode_params.encodeGUID, sizeof(*guids))) {
435  ret = 0;
436  break;
437  }
438  }
439 
440 fail:
441  av_free(guids);
442 
443  return ret;
444 }
445 
446 static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
447 {
448  NvencContext *ctx = avctx->priv_data;
449  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
450  NV_ENC_CAPS_PARAM params = { 0 };
451  int ret, val = 0;
452 
453  params.version = NV_ENC_CAPS_PARAM_VER;
454  params.capsToQuery = cap;
455 
456  ret = p_nvenc->nvEncGetEncodeCaps(ctx->nvencoder, ctx->init_encode_params.encodeGUID, &params, &val);
457 
458  if (ret == NV_ENC_SUCCESS)
459  return val;
460  return 0;
461 }
462 
464 {
465  NvencContext *ctx = avctx->priv_data;
466  int tmp, ret;
467 
469  if (ret < 0) {
470  av_log(avctx, AV_LOG_WARNING, "Codec not supported\n");
471  return ret;
472  }
473 
474  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_YUV444_ENCODE);
475  if (IS_YUV444(ctx->data_pix_fmt) && ret <= 0) {
476  av_log(avctx, AV_LOG_WARNING, "YUV444P not supported\n");
477  return AVERROR(ENOSYS);
478  }
479 
480  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOSSLESS_ENCODE);
481  if (ctx->flags & NVENC_LOSSLESS && ret <= 0) {
482  av_log(avctx, AV_LOG_WARNING, "Lossless encoding not supported\n");
483  return AVERROR(ENOSYS);
484  }
485 
486  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_WIDTH_MAX);
487  if (ret < avctx->width) {
488  av_log(avctx, AV_LOG_WARNING, "Width %d exceeds %d\n",
489  avctx->width, ret);
490  return AVERROR(ENOSYS);
491  }
492 
493  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_HEIGHT_MAX);
494  if (ret < avctx->height) {
495  av_log(avctx, AV_LOG_WARNING, "Height %d exceeds %d\n",
496  avctx->height, ret);
497  return AVERROR(ENOSYS);
498  }
499 
500  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_NUM_MAX_BFRAMES);
501  if (ret < avctx->max_b_frames) {
502  av_log(avctx, AV_LOG_WARNING, "Max B-frames %d exceed %d\n",
503  avctx->max_b_frames, ret);
504 
505  return AVERROR(ENOSYS);
506  }
507 
508  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_FIELD_ENCODING);
509  if (ret < 1 && avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
510  av_log(avctx, AV_LOG_WARNING,
511  "Interlaced encoding is not supported. Supported level: %d\n",
512  ret);
513  return AVERROR(ENOSYS);
514  }
515 
516  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_10BIT_ENCODE);
517  if ((IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) && ret <= 0) {
518  av_log(avctx, AV_LOG_WARNING, "10 bit encode not supported\n");
519  return AVERROR(ENOSYS);
520  }
521 
522  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOOKAHEAD);
523  if (ctx->rc_lookahead > 0 && ret <= 0) {
524  av_log(avctx, AV_LOG_WARNING, "RC lookahead not supported\n");
525  return AVERROR(ENOSYS);
526  }
527 
528  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_TEMPORAL_AQ);
529  if (ctx->temporal_aq > 0 && ret <= 0) {
530  av_log(avctx, AV_LOG_WARNING, "Temporal AQ not supported\n");
531  return AVERROR(ENOSYS);
532  }
533 
534  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_WEIGHTED_PREDICTION);
535  if (ctx->weighted_pred > 0 && ret <= 0) {
536  av_log (avctx, AV_LOG_WARNING, "Weighted Prediction not supported\n");
537  return AVERROR(ENOSYS);
538  }
539 
540  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_CABAC);
541  if (ctx->coder == NV_ENC_H264_ENTROPY_CODING_MODE_CABAC && ret <= 0) {
542  av_log(avctx, AV_LOG_WARNING, "CABAC entropy coding not supported\n");
543  return AVERROR(ENOSYS);
544  }
545 
546 #ifdef NVENC_HAVE_BFRAME_REF_MODE
547  tmp = (ctx->b_ref_mode >= 0) ? ctx->b_ref_mode : NV_ENC_BFRAME_REF_MODE_DISABLED;
548  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_BFRAME_REF_MODE);
549  if (tmp == NV_ENC_BFRAME_REF_MODE_EACH && ret != 1 && ret != 3) {
550  av_log(avctx, AV_LOG_WARNING, "Each B frame as reference is not supported\n");
551  return AVERROR(ENOSYS);
552  } else if (tmp != NV_ENC_BFRAME_REF_MODE_DISABLED && ret == 0) {
553  av_log(avctx, AV_LOG_WARNING, "B frames as references are not supported\n");
554  return AVERROR(ENOSYS);
555  }
556 #else
557  tmp = (ctx->b_ref_mode >= 0) ? ctx->b_ref_mode : 0;
558  if (tmp > 0) {
559  av_log(avctx, AV_LOG_WARNING, "B frames as references need SDK 8.1 at build time\n");
560  return AVERROR(ENOSYS);
561  }
562 #endif
563 
564 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
565  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_MULTIPLE_REF_FRAMES);
566  if(avctx->refs != NV_ENC_NUM_REF_FRAMES_AUTOSELECT && ret <= 0) {
567  av_log(avctx, AV_LOG_WARNING, "Multiple reference frames are not supported by the device\n");
568  return AVERROR(ENOSYS);
569  }
570 #else
571  if(avctx->refs != 0) {
572  av_log(avctx, AV_LOG_WARNING, "Multiple reference frames need SDK 9.1 at build time\n");
573  return AVERROR(ENOSYS);
574  }
575 #endif
576 
577 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
578  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SINGLE_SLICE_INTRA_REFRESH);
579  if(ctx->single_slice_intra_refresh && ret <= 0) {
580  av_log(avctx, AV_LOG_WARNING, "Single slice intra refresh not supported by the device\n");
581  return AVERROR(ENOSYS);
582  }
583 #else
584  if(ctx->single_slice_intra_refresh) {
585  av_log(avctx, AV_LOG_WARNING, "Single slice intra refresh needs SDK 11.1 at build time\n");
586  return AVERROR(ENOSYS);
587  }
588 #endif
589 
590  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_INTRA_REFRESH);
591  if((ctx->intra_refresh || ctx->single_slice_intra_refresh) && ret <= 0) {
592  av_log(avctx, AV_LOG_WARNING, "Intra refresh not supported by the device\n");
593  return AVERROR(ENOSYS);
594  }
595 
596 #ifndef NVENC_HAVE_HEVC_CONSTRAINED_ENCODING
597  if (ctx->constrained_encoding && avctx->codec->id == AV_CODEC_ID_HEVC) {
598  av_log(avctx, AV_LOG_WARNING, "HEVC constrained encoding needs SDK 10.0 at build time\n");
599  return AVERROR(ENOSYS);
600  }
601 #endif
602 
603  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_CONSTRAINED_ENCODING);
604  if(ctx->constrained_encoding && ret <= 0) {
605  av_log(avctx, AV_LOG_WARNING, "Constrained encoding not supported by the device\n");
606  return AVERROR(ENOSYS);
607  }
608 
609 #ifdef NVENC_HAVE_TEMPORAL_FILTER
610  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_TEMPORAL_FILTER);
611  if(ctx->tf_level > 0 && ret <= 0) {
612  av_log(avctx, AV_LOG_WARNING, "Temporal filtering not supported by the device\n");
613  return AVERROR(ENOSYS);
614  }
615 #endif
616 
617 #ifdef NVENC_HAVE_LOOKAHEAD_LEVEL
618  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOOKAHEAD_LEVEL);
619  if(ctx->rc_lookahead > 0 && ctx->lookahead_level > 0 &&
620  ctx->lookahead_level != NV_ENC_LOOKAHEAD_LEVEL_AUTOSELECT &&
621  ctx->lookahead_level > ret)
622  {
623  av_log(avctx, AV_LOG_WARNING, "Lookahead level not supported. Maximum level: %d\n", ret);
624  return AVERROR(ENOSYS);
625  }
626 #endif
627 
628 #ifdef NVENC_HAVE_UNIDIR_B
629  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_UNIDIRECTIONAL_B);
630  if(ctx->unidir_b && ret <= 0) {
631  av_log(avctx, AV_LOG_WARNING, "Unidirectional B-Frames not supported by the device\n");
632  return AVERROR(ENOSYS);
633  }
634 #endif
635 
636  ctx->support_dyn_bitrate = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_DYN_BITRATE_CHANGE);
637 
638  return 0;
639 }
640 
641 static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
642 {
643  NvencContext *ctx = avctx->priv_data;
644  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
645  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
646  char name[128] = { 0};
647  int major, minor, ret;
648  CUdevice cu_device;
649  int loglevel = AV_LOG_VERBOSE;
650 
651  if (ctx->device == LIST_DEVICES)
652  loglevel = AV_LOG_INFO;
653 
654  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGet(&cu_device, idx));
655  if (ret < 0)
656  return ret;
657 
658  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGetName(name, sizeof(name), cu_device));
659  if (ret < 0)
660  return ret;
661 
662  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceComputeCapability(&major, &minor, cu_device));
663  if (ret < 0)
664  return ret;
665 
666  av_log(avctx, loglevel, "[ GPU #%d - < %s > has Compute SM %d.%d ]\n", idx, name, major, minor);
667  if (((major << 4) | minor) < NVENC_CAP) {
668  av_log(avctx, loglevel, "does not support NVENC\n");
669  goto fail;
670  }
671 
672  if (ctx->device != idx && ctx->device != ANY_DEVICE)
673  return -1;
674 
675  ret = CHECK_CU(dl_fn->cuda_dl->cuCtxCreate(&ctx->cu_context_internal, 0, cu_device));
676  if (ret < 0)
677  goto fail;
678 
679  ctx->cu_context = ctx->cu_context_internal;
680  ctx->cu_stream = NULL;
681 
682  if ((ret = nvenc_pop_context(avctx)) < 0)
683  goto fail2;
684 
685  if ((ret = nvenc_open_session(avctx)) < 0)
686  goto fail2;
687 
688  if ((ret = nvenc_check_capabilities(avctx)) < 0)
689  goto fail3;
690 
691  av_log(avctx, loglevel, "supports NVENC\n");
692 
693  dl_fn->nvenc_device_count++;
694 
695  if (ctx->device == idx || ctx->device == ANY_DEVICE)
696  return 0;
697 
698 fail3:
699  if ((ret = nvenc_push_context(avctx)) < 0)
700  return ret;
701 
702  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
703  ctx->nvencoder = NULL;
704 
705  if ((ret = nvenc_pop_context(avctx)) < 0)
706  return ret;
707 
708 fail2:
709  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
710  ctx->cu_context_internal = NULL;
711 
712 fail:
713  return AVERROR(ENOSYS);
714 }
715 
717 {
718  NvencContext *ctx = avctx->priv_data;
719  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
720 
721  switch (avctx->codec->id) {
722  case AV_CODEC_ID_H264:
723  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_H264_GUID;
724  break;
725  case AV_CODEC_ID_HEVC:
726  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_HEVC_GUID;
727  break;
728 #if CONFIG_AV1_NVENC_ENCODER
729  case AV_CODEC_ID_AV1:
730  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_AV1_GUID;
731  break;
732 #endif
733  default:
734  return AVERROR_BUG;
735  }
736 
738 
740  av_log(avctx, AV_LOG_WARNING, "The selected preset is deprecated. Use p1 to p7 + -tune or fast/medium/slow.\n");
741 
742  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11 || avctx->hw_frames_ctx || avctx->hw_device_ctx) {
743  AVHWFramesContext *frames_ctx;
744  AVHWDeviceContext *hwdev_ctx;
745  AVCUDADeviceContext *cuda_device_hwctx = NULL;
746 #if CONFIG_D3D11VA
747  AVD3D11VADeviceContext *d3d11_device_hwctx = NULL;
748 #endif
749  int ret;
750 
751  if (avctx->hw_frames_ctx) {
752  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
753  if (frames_ctx->format == AV_PIX_FMT_CUDA)
754  cuda_device_hwctx = frames_ctx->device_ctx->hwctx;
755 #if CONFIG_D3D11VA
756  else if (frames_ctx->format == AV_PIX_FMT_D3D11)
757  d3d11_device_hwctx = frames_ctx->device_ctx->hwctx;
758 #endif
759  else
760  return AVERROR(EINVAL);
761  } else if (avctx->hw_device_ctx) {
762  hwdev_ctx = (AVHWDeviceContext*)avctx->hw_device_ctx->data;
763  if (hwdev_ctx->type == AV_HWDEVICE_TYPE_CUDA)
764  cuda_device_hwctx = hwdev_ctx->hwctx;
765 #if CONFIG_D3D11VA
766  else if (hwdev_ctx->type == AV_HWDEVICE_TYPE_D3D11VA)
767  d3d11_device_hwctx = hwdev_ctx->hwctx;
768 #endif
769  else
770  return AVERROR(EINVAL);
771  } else {
772  return AVERROR(EINVAL);
773  }
774 
775  if (cuda_device_hwctx) {
776  ctx->cu_context = cuda_device_hwctx->cuda_ctx;
777  ctx->cu_stream = cuda_device_hwctx->stream;
778  }
779 #if CONFIG_D3D11VA
780  else if (d3d11_device_hwctx) {
781  ctx->d3d11_device = d3d11_device_hwctx->device;
782  ID3D11Device_AddRef(ctx->d3d11_device);
783  }
784 #endif
785 
786  ret = nvenc_open_session(avctx);
787  if (ret < 0)
788  return ret;
789 
790  ret = nvenc_check_capabilities(avctx);
791  if (ret < 0) {
792  av_log(avctx, AV_LOG_FATAL, "Provided device doesn't support required NVENC features\n");
793  return ret;
794  }
795  } else {
796  int i, nb_devices = 0;
797 
798  if (CHECK_CU(dl_fn->cuda_dl->cuInit(0)) < 0)
799  return AVERROR_UNKNOWN;
800 
801  if (CHECK_CU(dl_fn->cuda_dl->cuDeviceGetCount(&nb_devices)) < 0)
802  return AVERROR_UNKNOWN;
803 
804  if (!nb_devices) {
805  av_log(avctx, AV_LOG_FATAL, "No CUDA capable devices found\n");
806  return AVERROR_EXTERNAL;
807  }
808 
809  av_log(avctx, AV_LOG_VERBOSE, "%d CUDA capable devices found\n", nb_devices);
810 
811  dl_fn->nvenc_device_count = 0;
812  for (i = 0; i < nb_devices; ++i) {
813  if ((nvenc_check_device(avctx, i)) >= 0 && ctx->device != LIST_DEVICES)
814  return 0;
815  }
816 
817  if (ctx->device == LIST_DEVICES)
818  return AVERROR_EXIT;
819 
820  if (!dl_fn->nvenc_device_count) {
821  av_log(avctx, AV_LOG_FATAL, "No capable devices found\n");
822  return AVERROR_EXTERNAL;
823  }
824 
825  av_log(avctx, AV_LOG_FATAL, "Requested GPU %d, but only %d GPUs are available!\n", ctx->device, nb_devices);
826  return AVERROR(EINVAL);
827  }
828 
829  return 0;
830 }
831 
832 static av_cold void set_constqp(AVCodecContext *avctx)
833 {
834  NvencContext *ctx = avctx->priv_data;
835  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
836 #if CONFIG_AV1_NVENC_ENCODER
837  int qmax = avctx->codec->id == AV_CODEC_ID_AV1 ? 255 : 51;
838 #else
839  int qmax = 51;
840 #endif
841 
842  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
843 
844  if (ctx->init_qp_p >= 0) {
845  rc->constQP.qpInterP = ctx->init_qp_p;
846  if (ctx->init_qp_i >= 0 && ctx->init_qp_b >= 0) {
847  rc->constQP.qpIntra = ctx->init_qp_i;
848  rc->constQP.qpInterB = ctx->init_qp_b;
849  } else if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
850  rc->constQP.qpIntra = av_clip(
851  rc->constQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
852  rc->constQP.qpInterB = av_clip(
853  rc->constQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
854  } else {
855  rc->constQP.qpIntra = rc->constQP.qpInterP;
856  rc->constQP.qpInterB = rc->constQP.qpInterP;
857  }
858  } else if (ctx->cqp >= 0) {
859  rc->constQP.qpInterP = rc->constQP.qpInterB = rc->constQP.qpIntra = ctx->cqp;
860  if (avctx->b_quant_factor != 0.0)
861  rc->constQP.qpInterB = av_clip(ctx->cqp * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
862  if (avctx->i_quant_factor != 0.0)
863  rc->constQP.qpIntra = av_clip(ctx->cqp * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
864  }
865 
866  avctx->qmin = -1;
867  avctx->qmax = -1;
868 }
869 
870 static av_cold void set_vbr(AVCodecContext *avctx)
871 {
872  NvencContext *ctx = avctx->priv_data;
873  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
874  int qp_inter_p;
875 #if CONFIG_AV1_NVENC_ENCODER
876  int qmax = avctx->codec->id == AV_CODEC_ID_AV1 ? 255 : 51;
877 #else
878  int qmax = 51;
879 #endif
880 
881  if (avctx->qmin >= 0 && avctx->qmax >= 0) {
882  rc->enableMinQP = 1;
883  rc->enableMaxQP = 1;
884 
885  rc->minQP.qpInterB = avctx->qmin;
886  rc->minQP.qpInterP = avctx->qmin;
887  rc->minQP.qpIntra = avctx->qmin;
888 
889  rc->maxQP.qpInterB = avctx->qmax;
890  rc->maxQP.qpInterP = avctx->qmax;
891  rc->maxQP.qpIntra = avctx->qmax;
892 
893  qp_inter_p = (avctx->qmax + 3 * avctx->qmin) / 4; // biased towards Qmin
894  } else if (avctx->qmin >= 0) {
895  rc->enableMinQP = 1;
896 
897  rc->minQP.qpInterB = avctx->qmin;
898  rc->minQP.qpInterP = avctx->qmin;
899  rc->minQP.qpIntra = avctx->qmin;
900 
901  qp_inter_p = avctx->qmin;
902  } else {
903  qp_inter_p = 26; // default to 26
904  }
905 
906  rc->enableInitialRCQP = 1;
907 
908  if (ctx->init_qp_p < 0) {
909  rc->initialRCQP.qpInterP = qp_inter_p;
910  } else {
911  rc->initialRCQP.qpInterP = ctx->init_qp_p;
912  }
913 
914  if (ctx->init_qp_i < 0) {
915  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
916  rc->initialRCQP.qpIntra = av_clip(
917  rc->initialRCQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
918  } else {
919  rc->initialRCQP.qpIntra = rc->initialRCQP.qpInterP;
920  }
921  } else {
922  rc->initialRCQP.qpIntra = ctx->init_qp_i;
923  }
924 
925  if (ctx->init_qp_b < 0) {
926  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
927  rc->initialRCQP.qpInterB = av_clip(
928  rc->initialRCQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
929  } else {
930  rc->initialRCQP.qpInterB = rc->initialRCQP.qpInterP;
931  }
932  } else {
933  rc->initialRCQP.qpInterB = ctx->init_qp_b;
934  }
935 }
936 
938 {
939  NvencContext *ctx = avctx->priv_data;
940  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
941 
942  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
943  rc->constQP.qpInterB = 0;
944  rc->constQP.qpInterP = 0;
945  rc->constQP.qpIntra = 0;
946 
947  avctx->qmin = -1;
948  avctx->qmax = -1;
949 }
950 
952 {
953  NvencContext *ctx = avctx->priv_data;
954  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
955 
956  switch (ctx->rc) {
957  case NV_ENC_PARAMS_RC_CONSTQP:
958  set_constqp(avctx);
959  return;
960 #ifndef NVENC_NO_DEPRECATED_RC
961  case NV_ENC_PARAMS_RC_VBR_MINQP:
962  if (avctx->qmin < 0) {
963  av_log(avctx, AV_LOG_WARNING,
964  "The variable bitrate rate-control requires "
965  "the 'qmin' option set.\n");
966  set_vbr(avctx);
967  return;
968  }
969  /* fall through */
970  case NV_ENC_PARAMS_RC_VBR_HQ:
971 #endif
972  case NV_ENC_PARAMS_RC_VBR:
973  set_vbr(avctx);
974  break;
975  case NV_ENC_PARAMS_RC_CBR:
976 #ifndef NVENC_NO_DEPRECATED_RC
977  case NV_ENC_PARAMS_RC_CBR_HQ:
978  case NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ:
979 #endif
980  break;
981  }
982 
983  rc->rateControlMode = ctx->rc;
984 }
985 
987 {
988  NvencContext *ctx = avctx->priv_data;
989  // default minimum of 4 surfaces
990  // multiply by 2 for number of NVENCs on gpu (hardcode to 2)
991  // another multiply by 2 to avoid blocking next PBB group
992  int nb_surfaces = FFMAX(4, ctx->encode_config.frameIntervalP * 2 * 2);
993 
994  // lookahead enabled
995  if (ctx->rc_lookahead > 0) {
996  // +1 is to account for lkd_bound calculation later
997  // +4 is to allow sufficient pipelining with lookahead
998  nb_surfaces = FFMAX(1, FFMAX(nb_surfaces, ctx->rc_lookahead + ctx->encode_config.frameIntervalP + 1 + 4));
999  if (nb_surfaces > ctx->nb_surfaces && ctx->nb_surfaces > 0)
1000  {
1001  av_log(avctx, AV_LOG_WARNING,
1002  "Defined rc_lookahead requires more surfaces, "
1003  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
1004  }
1005  ctx->nb_surfaces = FFMAX(nb_surfaces, ctx->nb_surfaces);
1006  } else {
1007  if (ctx->encode_config.frameIntervalP > 1 && ctx->nb_surfaces < nb_surfaces && ctx->nb_surfaces > 0)
1008  {
1009  av_log(avctx, AV_LOG_WARNING,
1010  "Defined b-frame requires more surfaces, "
1011  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
1012  ctx->nb_surfaces = FFMAX(ctx->nb_surfaces, nb_surfaces);
1013  }
1014  else if (ctx->nb_surfaces <= 0)
1015  ctx->nb_surfaces = nb_surfaces;
1016  // otherwise use user specified value
1017  }
1018 
1019  ctx->nb_surfaces = FFMAX(1, FFMIN(MAX_REGISTERED_FRAMES, ctx->nb_surfaces));
1020  ctx->async_depth = FFMIN(ctx->async_depth, ctx->nb_surfaces - 1);
1021 
1022  // Output in the worst case will only start when the surface buffer is completely full.
1023  // Hence we need to keep at least the max amount of surfaces plus the max reorder delay around.
1024  ctx->frame_data_array_nb = ctx->nb_surfaces + ctx->encode_config.frameIntervalP - 1;
1025 
1026  return 0;
1027 }
1028 
1030 {
1031  NvencContext *ctx = avctx->priv_data;
1032 
1033  if (avctx->global_quality > 0)
1034  av_log(avctx, AV_LOG_WARNING, "Using global_quality with nvenc is deprecated. Use qp instead.\n");
1035 
1036  if (ctx->cqp < 0 && avctx->global_quality > 0)
1037  ctx->cqp = avctx->global_quality;
1038 
1039  if (avctx->bit_rate > 0) {
1040  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate;
1041  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
1042  ctx->encode_config.rcParams.maxBitRate = ctx->encode_config.rcParams.averageBitRate;
1043  }
1044 
1045  if (avctx->rc_max_rate > 0)
1046  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
1047 
1048 #ifdef NVENC_HAVE_MULTIPASS
1049  ctx->encode_config.rcParams.multiPass = ctx->multipass;
1050 
1051  if (ctx->flags & NVENC_ONE_PASS)
1052  ctx->encode_config.rcParams.multiPass = NV_ENC_MULTI_PASS_DISABLED;
1053  if (ctx->flags & NVENC_TWO_PASSES || ctx->twopass > 0)
1054  ctx->encode_config.rcParams.multiPass = NV_ENC_TWO_PASS_FULL_RESOLUTION;
1055 
1056  if (ctx->rc < 0) {
1057  if (ctx->cbr) {
1058  ctx->rc = NV_ENC_PARAMS_RC_CBR;
1059  } else if (ctx->cqp >= 0) {
1060  ctx->rc = NV_ENC_PARAMS_RC_CONSTQP;
1061  } else if (ctx->quality >= 0.0f) {
1062  ctx->rc = NV_ENC_PARAMS_RC_VBR;
1063  }
1064  }
1065 #else
1066  if (ctx->rc < 0) {
1067  if (ctx->flags & NVENC_ONE_PASS)
1068  ctx->twopass = 0;
1069  if (ctx->flags & NVENC_TWO_PASSES)
1070  ctx->twopass = 1;
1071 
1072  if (ctx->twopass < 0)
1073  ctx->twopass = (ctx->flags & NVENC_LOWLATENCY) != 0;
1074 
1075  if (ctx->cbr) {
1076  if (ctx->twopass) {
1077  ctx->rc = NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ;
1078  } else {
1079  ctx->rc = NV_ENC_PARAMS_RC_CBR;
1080  }
1081  } else if (ctx->cqp >= 0) {
1082  ctx->rc = NV_ENC_PARAMS_RC_CONSTQP;
1083  } else if (ctx->twopass) {
1084  ctx->rc = NV_ENC_PARAMS_RC_VBR_HQ;
1085  } else if (avctx->qmin >= 0 && avctx->qmax >= 0) {
1086  ctx->rc = NV_ENC_PARAMS_RC_VBR_MINQP;
1087  }
1088  }
1089 #endif
1090 
1091  if (ctx->rc >= 0 && ctx->rc & RC_MODE_DEPRECATED) {
1092  av_log(avctx, AV_LOG_WARNING, "Specified rc mode is deprecated.\n");
1093  av_log(avctx, AV_LOG_WARNING, "Use -rc constqp/cbr/vbr, -tune and -multipass instead.\n");
1094 
1095  ctx->rc &= ~RC_MODE_DEPRECATED;
1096  }
1097 
1098 #ifdef NVENC_HAVE_QP_CHROMA_OFFSETS
1099  ctx->encode_config.rcParams.cbQPIndexOffset = ctx->qp_cb_offset;
1100  ctx->encode_config.rcParams.crQPIndexOffset = ctx->qp_cr_offset;
1101 #else
1102  if (ctx->qp_cb_offset || ctx->qp_cr_offset)
1103  av_log(avctx, AV_LOG_WARNING, "Failed setting QP CB/CR offsets, SDK 11.1 or greater required at compile time.\n");
1104 #endif
1105 
1106 #ifdef NVENC_HAVE_LDKFS
1107  if (ctx->ldkfs)
1108  ctx->encode_config.rcParams.lowDelayKeyFrameScale = ctx->ldkfs;
1109 #endif
1110 
1111  if (ctx->flags & NVENC_LOSSLESS) {
1112  set_lossless(avctx);
1113  } else if (ctx->rc >= 0) {
1115  } else {
1116  ctx->encode_config.rcParams.rateControlMode = NV_ENC_PARAMS_RC_VBR;
1117  set_vbr(avctx);
1118  }
1119 
1120  if (avctx->rc_buffer_size > 0) {
1121  ctx->encode_config.rcParams.vbvBufferSize = avctx->rc_buffer_size;
1122  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
1123  avctx->rc_buffer_size = ctx->encode_config.rcParams.vbvBufferSize = 2 * ctx->encode_config.rcParams.averageBitRate;
1124  }
1125 
1126  if (ctx->aq) {
1127  ctx->encode_config.rcParams.enableAQ = 1;
1128  ctx->encode_config.rcParams.aqStrength = ctx->aq_strength;
1129  av_log(avctx, AV_LOG_VERBOSE, "AQ enabled.\n");
1130  }
1131 
1132  if (ctx->temporal_aq) {
1133  ctx->encode_config.rcParams.enableTemporalAQ = 1;
1134  av_log(avctx, AV_LOG_VERBOSE, "Temporal AQ enabled.\n");
1135  }
1136 
1137  if (ctx->rc_lookahead > 0) {
1138  int lkd_bound = FFMIN(ctx->nb_surfaces, ctx->async_depth) -
1139  ctx->encode_config.frameIntervalP - 4;
1140 
1141  if (lkd_bound < 0) {
1142  ctx->encode_config.rcParams.enableLookahead = 0;
1143  av_log(avctx, AV_LOG_WARNING,
1144  "Lookahead not enabled. Increase buffer delay (-delay).\n");
1145  } else {
1146  ctx->encode_config.rcParams.enableLookahead = 1;
1147  ctx->encode_config.rcParams.lookaheadDepth = av_clip(ctx->rc_lookahead, 0, lkd_bound);
1148  ctx->encode_config.rcParams.disableIadapt = ctx->no_scenecut;
1149  ctx->encode_config.rcParams.disableBadapt = !ctx->b_adapt;
1150  av_log(avctx, AV_LOG_VERBOSE,
1151  "Lookahead enabled: depth %d, scenecut %s, B-adapt %s.\n",
1152  ctx->encode_config.rcParams.lookaheadDepth,
1153  ctx->encode_config.rcParams.disableIadapt ? "disabled" : "enabled",
1154  ctx->encode_config.rcParams.disableBadapt ? "disabled" : "enabled");
1155  if (ctx->encode_config.rcParams.lookaheadDepth < ctx->rc_lookahead)
1156  av_log(avctx, AV_LOG_WARNING, "Clipping lookahead depth to %d (from %d) due to lack of surfaces/delay",
1157  ctx->encode_config.rcParams.lookaheadDepth, ctx->rc_lookahead);
1158 
1159 #ifdef NVENC_HAVE_LOOKAHEAD_LEVEL
1160  if (ctx->lookahead_level >= 0) {
1161  switch (ctx->lookahead_level) {
1162  case NV_ENC_LOOKAHEAD_LEVEL_0:
1163  case NV_ENC_LOOKAHEAD_LEVEL_1:
1164  case NV_ENC_LOOKAHEAD_LEVEL_2:
1165  case NV_ENC_LOOKAHEAD_LEVEL_3:
1166  case NV_ENC_LOOKAHEAD_LEVEL_AUTOSELECT:
1167  break;
1168  default:
1169  av_log(avctx, AV_LOG_ERROR, "Invalid lookahead level.\n");
1170  return AVERROR(EINVAL);
1171  }
1172 
1173  ctx->encode_config.rcParams.lookaheadLevel = ctx->lookahead_level;
1174  }
1175 #endif
1176  }
1177  }
1178 
1179  if (ctx->strict_gop) {
1180  ctx->encode_config.rcParams.strictGOPTarget = 1;
1181  av_log(avctx, AV_LOG_VERBOSE, "Strict GOP target enabled.\n");
1182  }
1183 
1184  if (ctx->nonref_p)
1185  ctx->encode_config.rcParams.enableNonRefP = 1;
1186 
1187  if (ctx->zerolatency)
1188  ctx->encode_config.rcParams.zeroReorderDelay = 1;
1189 
1190  if (ctx->quality) {
1191  //convert from float to fixed point 8.8
1192  int tmp_quality = (int)(ctx->quality * 256.0f);
1193  ctx->encode_config.rcParams.targetQuality = (uint8_t)(tmp_quality >> 8);
1194  ctx->encode_config.rcParams.targetQualityLSB = (uint8_t)(tmp_quality & 0xff);
1195 
1196  av_log(avctx, AV_LOG_VERBOSE, "CQ(%d) mode enabled.\n", tmp_quality);
1197 
1198  // CQ mode shall discard avg bitrate/vbv buffer size and honor only max bitrate
1199  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate = 0;
1200  ctx->encode_config.rcParams.vbvBufferSize = avctx->rc_buffer_size = 0;
1201  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
1202  }
1203 
1204  return 0;
1205 }
1206 
1208 {
1209  NvencContext *ctx = avctx->priv_data;
1210  NV_ENC_CONFIG *cc = &ctx->encode_config;
1211  NV_ENC_CONFIG_H264 *h264 = &cc->encodeCodecConfig.h264Config;
1212  NV_ENC_CONFIG_H264_VUI_PARAMETERS *vui = &h264->h264VUIParameters;
1213 
1214  const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1215 
1216  if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1217  vui->colourMatrix = AVCOL_SPC_BT470BG;
1218  vui->colourPrimaries = avctx->color_primaries;
1219  vui->transferCharacteristics = avctx->color_trc;
1220  vui->videoFullRangeFlag = 0;
1221  } else {
1222  vui->colourMatrix = IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace;
1223  vui->colourPrimaries = avctx->color_primaries;
1224  vui->transferCharacteristics = avctx->color_trc;
1225  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1226  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1227  }
1228 
1229  vui->colourDescriptionPresentFlag =
1230  (vui->colourMatrix != 2 || vui->colourPrimaries != 2 || vui->transferCharacteristics != 2);
1231 
1232  vui->videoSignalTypePresentFlag =
1233  (vui->colourDescriptionPresentFlag
1234  || vui->videoFormat != 5
1235  || vui->videoFullRangeFlag != 0);
1236 
1237  if (ctx->max_slice_size > 0) {
1238  h264->sliceMode = 1;
1239  h264->sliceModeData = ctx->max_slice_size;
1240  } else {
1241  h264->sliceMode = 3;
1242  h264->sliceModeData = avctx->slices > 0 ? avctx->slices : 1;
1243  }
1244 
1245  if (ctx->intra_refresh) {
1246  h264->enableIntraRefresh = 1;
1247  h264->intraRefreshPeriod = cc->gopLength;
1248  h264->intraRefreshCnt = cc->gopLength - 1;
1249  cc->gopLength = NVENC_INFINITE_GOPLENGTH;
1250 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
1251  h264->singleSliceIntraRefresh = ctx->single_slice_intra_refresh;
1252 #endif
1253  }
1254 
1255  if (ctx->constrained_encoding)
1256  h264->enableConstrainedEncoding = 1;
1257 
1258  h264->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1259  h264->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1260  h264->outputAUD = ctx->aud;
1261 
1262  if (ctx->dpb_size >= 0) {
1263  /* 0 means "let the hardware decide" */
1264  h264->maxNumRefFrames = ctx->dpb_size;
1265  }
1266 
1267  h264->idrPeriod = cc->gopLength;
1268 
1269  if (IS_CBR(cc->rcParams.rateControlMode)) {
1270  h264->outputBufferingPeriodSEI = 1;
1271  }
1272 
1273  h264->outputPictureTimingSEI = 1;
1274 
1275 #ifndef NVENC_NO_DEPRECATED_RC
1276  if (cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ ||
1277  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_HQ ||
1278  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_VBR_HQ) {
1279  h264->adaptiveTransformMode = NV_ENC_H264_ADAPTIVE_TRANSFORM_ENABLE;
1280  h264->fmoMode = NV_ENC_H264_FMO_DISABLE;
1281  }
1282 #endif
1283 
1284  if (ctx->flags & NVENC_LOSSLESS) {
1285  h264->qpPrimeYZeroTransformBypassFlag = 1;
1286  } else {
1287  switch(ctx->profile) {
1289  cc->profileGUID = NV_ENC_H264_PROFILE_BASELINE_GUID;
1291  break;
1293  cc->profileGUID = NV_ENC_H264_PROFILE_MAIN_GUID;
1294  avctx->profile = AV_PROFILE_H264_MAIN;
1295  break;
1297  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_GUID;
1298  avctx->profile = AV_PROFILE_H264_HIGH;
1299  break;
1301  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1303  break;
1304  }
1305  }
1306 
1307  // force setting profile as high444p if input is AV_PIX_FMT_YUV444P
1308  if (IS_YUV444(ctx->data_pix_fmt)) {
1309  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1311  }
1312 
1313  h264->chromaFormatIDC = avctx->profile == AV_PROFILE_H264_HIGH_444_PREDICTIVE ? 3 : 1;
1314 
1315  h264->level = ctx->level;
1316 
1317 #ifdef NVENC_HAVE_NEW_BIT_DEPTH_API
1318  h264->inputBitDepth = h264->outputBitDepth =
1319  IS_10BIT(ctx->data_pix_fmt) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1320 #endif
1321 
1322  if (ctx->coder >= 0)
1323  h264->entropyCodingMode = ctx->coder;
1324 
1325 #ifdef NVENC_HAVE_BFRAME_REF_MODE
1326  if (ctx->b_ref_mode >= 0)
1327  h264->useBFramesAsRef = ctx->b_ref_mode;
1328 #endif
1329 
1330 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
1331  h264->numRefL0 = avctx->refs;
1332  h264->numRefL1 = avctx->refs;
1333 #endif
1334 
1335  return 0;
1336 }
1337 
1339 {
1340  NvencContext *ctx = avctx->priv_data;
1341  NV_ENC_CONFIG *cc = &ctx->encode_config;
1342  NV_ENC_CONFIG_HEVC *hevc = &cc->encodeCodecConfig.hevcConfig;
1343  NV_ENC_CONFIG_HEVC_VUI_PARAMETERS *vui = &hevc->hevcVUIParameters;
1344 
1345  const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1346 
1347  if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1348  vui->colourMatrix = AVCOL_SPC_BT470BG;
1349  vui->colourPrimaries = avctx->color_primaries;
1350  vui->transferCharacteristics = avctx->color_trc;
1351  vui->videoFullRangeFlag = 0;
1352  } else {
1353  vui->colourMatrix = IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace;
1354  vui->colourPrimaries = avctx->color_primaries;
1355  vui->transferCharacteristics = avctx->color_trc;
1356  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1357  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1358  }
1359 
1360  vui->colourDescriptionPresentFlag =
1361  (vui->colourMatrix != 2 || vui->colourPrimaries != 2 || vui->transferCharacteristics != 2);
1362 
1363  vui->videoSignalTypePresentFlag =
1364  (vui->colourDescriptionPresentFlag
1365  || vui->videoFormat != 5
1366  || vui->videoFullRangeFlag != 0);
1367 
1368  if (ctx->max_slice_size > 0) {
1369  hevc->sliceMode = 1;
1370  hevc->sliceModeData = ctx->max_slice_size;
1371  } else {
1372  hevc->sliceMode = 3;
1373  hevc->sliceModeData = avctx->slices > 0 ? avctx->slices : 1;
1374  }
1375 
1376  if (ctx->intra_refresh) {
1377  hevc->enableIntraRefresh = 1;
1378  hevc->intraRefreshPeriod = cc->gopLength;
1379  hevc->intraRefreshCnt = cc->gopLength - 1;
1380  cc->gopLength = NVENC_INFINITE_GOPLENGTH;
1381 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
1382  hevc->singleSliceIntraRefresh = ctx->single_slice_intra_refresh;
1383 #endif
1384  }
1385 
1386 #ifdef NVENC_HAVE_HEVC_CONSTRAINED_ENCODING
1387  if (ctx->constrained_encoding)
1388  hevc->enableConstrainedEncoding = 1;
1389 #endif
1390 
1391  hevc->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1392  hevc->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1393  hevc->outputAUD = ctx->aud;
1394 
1395  if (ctx->dpb_size >= 0) {
1396  /* 0 means "let the hardware decide" */
1397  hevc->maxNumRefFramesInDPB = ctx->dpb_size;
1398  }
1399 
1400  hevc->idrPeriod = cc->gopLength;
1401 
1402  if (IS_CBR(cc->rcParams.rateControlMode)) {
1403  hevc->outputBufferingPeriodSEI = 1;
1404  }
1405 
1406  hevc->outputPictureTimingSEI = 1;
1407 
1408  switch (ctx->profile) {
1410  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN_GUID;
1411  avctx->profile = AV_PROFILE_HEVC_MAIN;
1412  break;
1414  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1416  break;
1418  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1419  avctx->profile = AV_PROFILE_HEVC_REXT;
1420  break;
1421  }
1422 
1423  // force setting profile as main10 if input is 10 bit or if it should be encoded as 10 bit
1424  if (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) {
1425  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1427  }
1428 
1429  // force setting profile as rext if input is yuv444
1430  if (IS_YUV444(ctx->data_pix_fmt)) {
1431  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1432  avctx->profile = AV_PROFILE_HEVC_REXT;
1433  }
1434 
1435  hevc->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : 1;
1436 
1437 #ifdef NVENC_HAVE_NEW_BIT_DEPTH_API
1438  hevc->inputBitDepth = IS_10BIT(ctx->data_pix_fmt) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1439  hevc->outputBitDepth = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1440 #else
1441  hevc->pixelBitDepthMinus8 = IS_10BIT(ctx->data_pix_fmt) ? 2 : 0;
1442 #endif
1443 
1444  hevc->level = ctx->level;
1445 
1446  hevc->tier = ctx->tier;
1447 
1448 #ifdef NVENC_HAVE_HEVC_BFRAME_REF_MODE
1449  if (ctx->b_ref_mode >= 0)
1450  hevc->useBFramesAsRef = ctx->b_ref_mode;
1451 #endif
1452 
1453 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
1454  hevc->numRefL0 = avctx->refs;
1455  hevc->numRefL1 = avctx->refs;
1456 #endif
1457 
1458 #ifdef NVENC_HAVE_TEMPORAL_FILTER
1459  if (ctx->tf_level >= 0) {
1460  hevc->tfLevel = ctx->tf_level;
1461 
1462  switch (ctx->tf_level)
1463  {
1464  case NV_ENC_TEMPORAL_FILTER_LEVEL_0:
1465  case NV_ENC_TEMPORAL_FILTER_LEVEL_4:
1466  break;
1467  default:
1468  av_log(avctx, AV_LOG_ERROR, "Invalid temporal filtering level.\n");
1469  return AVERROR(EINVAL);
1470  }
1471 
1472  if (ctx->encode_config.frameIntervalP < 5)
1473  av_log(avctx, AV_LOG_WARNING, "Temporal filtering needs at least 4 B-Frames (-bf 4).\n");
1474  }
1475 #endif
1476 
1477  return 0;
1478 }
1479 
1480 #if CONFIG_AV1_NVENC_ENCODER
1481 static av_cold int nvenc_setup_av1_config(AVCodecContext *avctx)
1482 {
1483  NvencContext *ctx = avctx->priv_data;
1484  NV_ENC_CONFIG *cc = &ctx->encode_config;
1485  NV_ENC_CONFIG_AV1 *av1 = &cc->encodeCodecConfig.av1Config;
1486 
1487  const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1488 
1489  if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1490  av1->matrixCoefficients = AVCOL_SPC_BT470BG;
1491  av1->colorPrimaries = avctx->color_primaries;
1492  av1->transferCharacteristics = avctx->color_trc;
1493  av1->colorRange = 0;
1494  } else {
1495  av1->matrixCoefficients = IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace;
1496  av1->colorPrimaries = avctx->color_primaries;
1497  av1->transferCharacteristics = avctx->color_trc;
1498  av1->colorRange = (avctx->color_range == AVCOL_RANGE_JPEG
1499  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1500  }
1501 
1502  if (IS_YUV444(ctx->data_pix_fmt)) {
1503  av_log(avctx, AV_LOG_ERROR, "AV1 High Profile not supported, required for 4:4:4 encoding\n");
1504  return AVERROR(ENOTSUP);
1505  } else {
1506  cc->profileGUID = NV_ENC_AV1_PROFILE_MAIN_GUID;
1507  avctx->profile = AV_PROFILE_AV1_MAIN;
1508  }
1509 
1510  if (ctx->dpb_size >= 0) {
1511  /* 0 means "let the hardware decide" */
1512  av1->maxNumRefFramesInDPB = ctx->dpb_size;
1513  }
1514 
1515  if (ctx->intra_refresh) {
1516  av1->enableIntraRefresh = 1;
1517  av1->intraRefreshPeriod = cc->gopLength;
1518  av1->intraRefreshCnt = cc->gopLength - 1;
1519  cc->gopLength = NVENC_INFINITE_GOPLENGTH;
1520  }
1521 
1522  av1->idrPeriod = cc->gopLength;
1523 
1524  if (IS_CBR(cc->rcParams.rateControlMode)) {
1525  av1->enableBitstreamPadding = 1;
1526  }
1527 
1528  if (ctx->tile_cols >= 0)
1529  av1->numTileColumns = ctx->tile_cols;
1530  if (ctx->tile_rows >= 0)
1531  av1->numTileRows = ctx->tile_rows;
1532 
1533  av1->outputAnnexBFormat = 0;
1534 
1535  av1->level = ctx->level;
1536  av1->tier = ctx->tier;
1537 
1538  av1->enableTimingInfo = ctx->timing_info;
1539 
1540  /* mp4 encapsulation requires sequence headers to be present on all keyframes for AV1 */
1541  av1->disableSeqHdr = 0;
1542  av1->repeatSeqHdr = 1;
1543 
1544  av1->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : 1;
1545 
1546 #ifdef NVENC_HAVE_NEW_BIT_DEPTH_API
1547  av1->inputBitDepth = IS_10BIT(ctx->data_pix_fmt) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1548  av1->outputBitDepth = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1549 #else
1550  av1->inputPixelBitDepthMinus8 = IS_10BIT(ctx->data_pix_fmt) ? 2 : 0;
1551  av1->pixelBitDepthMinus8 = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? 2 : 0;
1552 #endif
1553 
1554  if (ctx->b_ref_mode >= 0)
1555  av1->useBFramesAsRef = ctx->b_ref_mode;
1556 
1557  av1->numFwdRefs = avctx->refs;
1558  av1->numBwdRefs = avctx->refs;
1559 
1560  return 0;
1561 }
1562 #endif
1563 
1565 {
1566  switch (avctx->codec->id) {
1567  case AV_CODEC_ID_H264:
1568  return nvenc_setup_h264_config(avctx);
1569  case AV_CODEC_ID_HEVC:
1570  return nvenc_setup_hevc_config(avctx);
1571 #if CONFIG_AV1_NVENC_ENCODER
1572  case AV_CODEC_ID_AV1:
1573  return nvenc_setup_av1_config(avctx);
1574 #endif
1575  /* Earlier switch/case will return if unknown codec is passed. */
1576  }
1577 
1578  return 0;
1579 }
1580 
1581 static void compute_dar(AVCodecContext *avctx, int *dw, int *dh) {
1582  int sw, sh;
1583 
1584  sw = avctx->width;
1585  sh = avctx->height;
1586 
1587 #if CONFIG_AV1_NVENC_ENCODER
1588  if (avctx->codec->id == AV_CODEC_ID_AV1) {
1589  /* For AV1 we actually need to calculate the render width/height, not the dar */
1590  if (avctx->sample_aspect_ratio.num > 0 && avctx->sample_aspect_ratio.den > 0
1591  && avctx->sample_aspect_ratio.num != avctx->sample_aspect_ratio.den)
1592  {
1593  if (avctx->sample_aspect_ratio.num > avctx->sample_aspect_ratio.den) {
1594  sw = av_rescale(sw, avctx->sample_aspect_ratio.num, avctx->sample_aspect_ratio.den);
1595  } else {
1596  sh = av_rescale(sh, avctx->sample_aspect_ratio.den, avctx->sample_aspect_ratio.num);
1597  }
1598  }
1599 
1600  *dw = sw;
1601  *dh = sh;
1602  return;
1603  }
1604 #endif
1605 
1606  if (avctx->sample_aspect_ratio.num > 0 && avctx->sample_aspect_ratio.den > 0) {
1607  sw *= avctx->sample_aspect_ratio.num;
1608  sh *= avctx->sample_aspect_ratio.den;
1609  }
1610 
1611  av_reduce(dw, dh, sw, sh, 1024 * 1024);
1612 }
1613 
1615 {
1616  NvencContext *ctx = avctx->priv_data;
1617  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1618  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1619 
1620  NV_ENC_PRESET_CONFIG preset_config = { 0 };
1621  NVENCSTATUS nv_status = NV_ENC_SUCCESS;
1622  AVCPBProperties *cpb_props;
1623  int res = 0;
1624  int dw, dh;
1625 
1626  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1627  ctx->init_encode_params.version = NV_ENC_INITIALIZE_PARAMS_VER;
1628 
1629  ctx->init_encode_params.encodeHeight = avctx->height;
1630  ctx->init_encode_params.encodeWidth = avctx->width;
1631 
1632  ctx->init_encode_params.encodeConfig = &ctx->encode_config;
1633 
1634  preset_config.version = NV_ENC_PRESET_CONFIG_VER;
1635  preset_config.presetCfg.version = NV_ENC_CONFIG_VER;
1636 
1637 #ifdef NVENC_HAVE_NEW_PRESETS
1638  ctx->init_encode_params.tuningInfo = ctx->tuning_info;
1639 
1640  if (ctx->flags & NVENC_LOSSLESS)
1641  ctx->init_encode_params.tuningInfo = NV_ENC_TUNING_INFO_LOSSLESS;
1642  else if (ctx->flags & NVENC_LOWLATENCY)
1643  ctx->init_encode_params.tuningInfo = NV_ENC_TUNING_INFO_LOW_LATENCY;
1644 
1645  nv_status = p_nvenc->nvEncGetEncodePresetConfigEx(ctx->nvencoder,
1646  ctx->init_encode_params.encodeGUID,
1647  ctx->init_encode_params.presetGUID,
1648  ctx->init_encode_params.tuningInfo,
1649  &preset_config);
1650 #else
1651  nv_status = p_nvenc->nvEncGetEncodePresetConfig(ctx->nvencoder,
1652  ctx->init_encode_params.encodeGUID,
1653  ctx->init_encode_params.presetGUID,
1654  &preset_config);
1655 #endif
1656  if (nv_status != NV_ENC_SUCCESS)
1657  return nvenc_print_error(avctx, nv_status, "Cannot get the preset configuration");
1658 
1659  memcpy(&ctx->encode_config, &preset_config.presetCfg, sizeof(ctx->encode_config));
1660 
1661  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1662 
1663  compute_dar(avctx, &dw, &dh);
1664  ctx->init_encode_params.darHeight = dh;
1665  ctx->init_encode_params.darWidth = dw;
1666 
1667  if (avctx->framerate.num > 0 && avctx->framerate.den > 0) {
1668  ctx->init_encode_params.frameRateNum = avctx->framerate.num;
1669  ctx->init_encode_params.frameRateDen = avctx->framerate.den;
1670  } else {
1671  ctx->init_encode_params.frameRateNum = avctx->time_base.den;
1673  ctx->init_encode_params.frameRateDen = avctx->time_base.num
1674 #if FF_API_TICKS_PER_FRAME
1675  * avctx->ticks_per_frame
1676 #endif
1677  ;
1679  }
1680 
1681 #ifdef NVENC_HAVE_UNIDIR_B
1682  ctx->init_encode_params.enableUniDirectionalB = ctx->unidir_b;
1683 #endif
1684 
1685  ctx->init_encode_params.enableEncodeAsync = 0;
1686  ctx->init_encode_params.enablePTD = 1;
1687 
1688 #ifdef NVENC_HAVE_NEW_PRESETS
1689  /* If lookahead isn't set from CLI, use value from preset.
1690  * P6 & P7 presets may enable lookahead for better quality.
1691  * */
1692  if (ctx->rc_lookahead == 0 && ctx->encode_config.rcParams.enableLookahead)
1693  ctx->rc_lookahead = ctx->encode_config.rcParams.lookaheadDepth;
1694 #endif
1695 
1696  if (ctx->weighted_pred == 1)
1697  ctx->init_encode_params.enableWeightedPrediction = 1;
1698 
1699 #ifdef NVENC_HAVE_SPLIT_FRAME_ENCODING
1700  ctx->init_encode_params.splitEncodeMode = ctx->split_encode_mode;
1701 
1702  if (ctx->split_encode_mode != NV_ENC_SPLIT_DISABLE_MODE) {
1703  if (avctx->codec->id == AV_CODEC_ID_HEVC && ctx->weighted_pred == 1)
1704  av_log(avctx, AV_LOG_WARNING, "Split encoding not supported with weighted prediction enabled.\n");
1705  }
1706 #endif
1707 
1708  if (ctx->bluray_compat) {
1709  ctx->aud = 1;
1710  ctx->dpb_size = FFMIN(FFMAX(avctx->refs, 0), 6);
1711  avctx->max_b_frames = FFMIN(avctx->max_b_frames, 3);
1712  switch (avctx->codec->id) {
1713  case AV_CODEC_ID_H264:
1714  /* maximum level depends on used resolution */
1715  break;
1716  case AV_CODEC_ID_HEVC:
1717  ctx->level = NV_ENC_LEVEL_HEVC_51;
1718  ctx->tier = NV_ENC_TIER_HEVC_HIGH;
1719  break;
1720  }
1721  }
1722 
1723  if (avctx->gop_size > 0) {
1724  // only overwrite preset if a GOP size was selected as input
1725  ctx->encode_config.gopLength = avctx->gop_size;
1726  } else if (avctx->gop_size == 0) {
1727  ctx->encode_config.frameIntervalP = 0;
1728  ctx->encode_config.gopLength = 1;
1729  }
1730 
1731  if (avctx->max_b_frames >= 0 && ctx->encode_config.gopLength > 1) {
1732  /* 0 is intra-only, 1 is I/P only, 2 is one B-Frame, 3 two B-frames, and so on. */
1733  ctx->encode_config.frameIntervalP = avctx->max_b_frames + 1;
1734  }
1735 
1736  /* force to enable intra refresh */
1737  if(ctx->single_slice_intra_refresh)
1738  ctx->intra_refresh = 1;
1739 
1740  nvenc_recalc_surfaces(avctx);
1741 
1742  res = nvenc_setup_rate_control(avctx);
1743  if (res < 0)
1744  return res;
1745 
1746  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
1747  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FIELD;
1748  } else {
1749  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FRAME;
1750  }
1751 
1752  res = nvenc_setup_codec_config(avctx);
1753  if (res)
1754  return res;
1755 
1756  res = nvenc_push_context(avctx);
1757  if (res < 0)
1758  return res;
1759 
1760  nv_status = p_nvenc->nvEncInitializeEncoder(ctx->nvencoder, &ctx->init_encode_params);
1761  if (nv_status != NV_ENC_SUCCESS) {
1762  nvenc_pop_context(avctx);
1763  return nvenc_print_error(avctx, nv_status, "InitializeEncoder failed");
1764  }
1765 
1766 #ifdef NVENC_HAVE_CUSTREAM_PTR
1767  if (ctx->cu_context) {
1768  nv_status = p_nvenc->nvEncSetIOCudaStreams(ctx->nvencoder, &ctx->cu_stream, &ctx->cu_stream);
1769  if (nv_status != NV_ENC_SUCCESS) {
1770  nvenc_pop_context(avctx);
1771  return nvenc_print_error(avctx, nv_status, "SetIOCudaStreams failed");
1772  }
1773  }
1774 #endif
1775 
1776  res = nvenc_pop_context(avctx);
1777  if (res < 0)
1778  return res;
1779 
1780  if (ctx->encode_config.frameIntervalP > 1)
1781  avctx->has_b_frames = 2;
1782 
1783  if (ctx->encode_config.rcParams.averageBitRate > 0)
1784  avctx->bit_rate = ctx->encode_config.rcParams.averageBitRate;
1785 
1786  cpb_props = ff_encode_add_cpb_side_data(avctx);
1787  if (!cpb_props)
1788  return AVERROR(ENOMEM);
1789  cpb_props->max_bitrate = ctx->encode_config.rcParams.maxBitRate;
1790  cpb_props->avg_bitrate = avctx->bit_rate;
1791  cpb_props->buffer_size = ctx->encode_config.rcParams.vbvBufferSize;
1792 
1793  return 0;
1794 }
1795 
1796 static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
1797 {
1798  switch (pix_fmt) {
1799  case AV_PIX_FMT_YUV420P:
1800  return NV_ENC_BUFFER_FORMAT_YV12;
1801  case AV_PIX_FMT_NV12:
1802  return NV_ENC_BUFFER_FORMAT_NV12;
1803  case AV_PIX_FMT_P010:
1804  case AV_PIX_FMT_P016:
1805  return NV_ENC_BUFFER_FORMAT_YUV420_10BIT;
1806  case AV_PIX_FMT_GBRP:
1807  case AV_PIX_FMT_YUV444P:
1808  return NV_ENC_BUFFER_FORMAT_YUV444;
1809  case AV_PIX_FMT_GBRP16:
1810  case AV_PIX_FMT_YUV444P16:
1811  return NV_ENC_BUFFER_FORMAT_YUV444_10BIT;
1812  case AV_PIX_FMT_0RGB32:
1813  case AV_PIX_FMT_RGB32:
1814  return NV_ENC_BUFFER_FORMAT_ARGB;
1815  case AV_PIX_FMT_0BGR32:
1816  case AV_PIX_FMT_BGR32:
1817  return NV_ENC_BUFFER_FORMAT_ABGR;
1818  case AV_PIX_FMT_X2RGB10:
1819  return NV_ENC_BUFFER_FORMAT_ARGB10;
1820  case AV_PIX_FMT_X2BGR10:
1821  return NV_ENC_BUFFER_FORMAT_ABGR10;
1822  default:
1823  return NV_ENC_BUFFER_FORMAT_UNDEFINED;
1824  }
1825 }
1826 
1827 static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
1828 {
1829  NvencContext *ctx = avctx->priv_data;
1830  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1831  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1832  NvencSurface* tmp_surface = &ctx->surfaces[idx];
1833 
1834  NVENCSTATUS nv_status;
1835  NV_ENC_CREATE_BITSTREAM_BUFFER allocOut = { 0 };
1836  allocOut.version = NV_ENC_CREATE_BITSTREAM_BUFFER_VER;
1837 
1838  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1839  ctx->surfaces[idx].in_ref = av_frame_alloc();
1840  if (!ctx->surfaces[idx].in_ref)
1841  return AVERROR(ENOMEM);
1842  } else {
1843  NV_ENC_CREATE_INPUT_BUFFER allocSurf = { 0 };
1844 
1845  ctx->surfaces[idx].format = nvenc_map_buffer_format(ctx->data_pix_fmt);
1846  if (ctx->surfaces[idx].format == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
1847  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
1848  av_get_pix_fmt_name(ctx->data_pix_fmt));
1849  return AVERROR(EINVAL);
1850  }
1851 
1852  allocSurf.version = NV_ENC_CREATE_INPUT_BUFFER_VER;
1853  allocSurf.width = avctx->width;
1854  allocSurf.height = avctx->height;
1855  allocSurf.bufferFmt = ctx->surfaces[idx].format;
1856 
1857  nv_status = p_nvenc->nvEncCreateInputBuffer(ctx->nvencoder, &allocSurf);
1858  if (nv_status != NV_ENC_SUCCESS) {
1859  return nvenc_print_error(avctx, nv_status, "CreateInputBuffer failed");
1860  }
1861 
1862  ctx->surfaces[idx].input_surface = allocSurf.inputBuffer;
1863  ctx->surfaces[idx].width = allocSurf.width;
1864  ctx->surfaces[idx].height = allocSurf.height;
1865  }
1866 
1867  nv_status = p_nvenc->nvEncCreateBitstreamBuffer(ctx->nvencoder, &allocOut);
1868  if (nv_status != NV_ENC_SUCCESS) {
1869  int err = nvenc_print_error(avctx, nv_status, "CreateBitstreamBuffer failed");
1870  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
1871  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[idx].input_surface);
1872  av_frame_free(&ctx->surfaces[idx].in_ref);
1873  return err;
1874  }
1875 
1876  ctx->surfaces[idx].output_surface = allocOut.bitstreamBuffer;
1877 
1878  av_fifo_write(ctx->unused_surface_queue, &tmp_surface, 1);
1879 
1880  return 0;
1881 }
1882 
1884 {
1885  NvencContext *ctx = avctx->priv_data;
1886  int i, res = 0, res2;
1887 
1888  ctx->surfaces = av_calloc(ctx->nb_surfaces, sizeof(*ctx->surfaces));
1889  if (!ctx->surfaces)
1890  return AVERROR(ENOMEM);
1891 
1892  ctx->frame_data_array = av_calloc(ctx->frame_data_array_nb, sizeof(*ctx->frame_data_array));
1893  if (!ctx->frame_data_array)
1894  return AVERROR(ENOMEM);
1895 
1896  ctx->timestamp_list = av_fifo_alloc2(ctx->nb_surfaces, sizeof(int64_t), 0);
1897  if (!ctx->timestamp_list)
1898  return AVERROR(ENOMEM);
1899 
1900  ctx->unused_surface_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
1901  if (!ctx->unused_surface_queue)
1902  return AVERROR(ENOMEM);
1903 
1904  ctx->output_surface_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
1905  if (!ctx->output_surface_queue)
1906  return AVERROR(ENOMEM);
1907  ctx->output_surface_ready_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
1908  if (!ctx->output_surface_ready_queue)
1909  return AVERROR(ENOMEM);
1910 
1911  res = nvenc_push_context(avctx);
1912  if (res < 0)
1913  return res;
1914 
1915  for (i = 0; i < ctx->nb_surfaces; i++) {
1916  if ((res = nvenc_alloc_surface(avctx, i)) < 0)
1917  goto fail;
1918  }
1919 
1920 fail:
1921  res2 = nvenc_pop_context(avctx);
1922  if (res2 < 0)
1923  return res2;
1924 
1925  return res;
1926 }
1927 
1929 {
1930  NvencContext *ctx = avctx->priv_data;
1931  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1932  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1933 
1934  NVENCSTATUS nv_status;
1935  uint32_t outSize = 0;
1936  char tmpHeader[NV_MAX_SEQ_HDR_LEN];
1937 
1938  NV_ENC_SEQUENCE_PARAM_PAYLOAD payload = { 0 };
1939  payload.version = NV_ENC_SEQUENCE_PARAM_PAYLOAD_VER;
1940 
1941  payload.spsppsBuffer = tmpHeader;
1942  payload.inBufferSize = sizeof(tmpHeader);
1943  payload.outSPSPPSPayloadSize = &outSize;
1944 
1945  nv_status = p_nvenc->nvEncGetSequenceParams(ctx->nvencoder, &payload);
1946  if (nv_status != NV_ENC_SUCCESS) {
1947  return nvenc_print_error(avctx, nv_status, "GetSequenceParams failed");
1948  }
1949 
1950  avctx->extradata_size = outSize;
1952 
1953  if (!avctx->extradata) {
1954  return AVERROR(ENOMEM);
1955  }
1956 
1957  memcpy(avctx->extradata, tmpHeader, outSize);
1958 
1959  return 0;
1960 }
1961 
1963 {
1964  NvencContext *ctx = avctx->priv_data;
1965  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1966  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1967  int i, res;
1968 
1969  /* the encoder has to be flushed before it can be closed */
1970  if (ctx->nvencoder) {
1971  NV_ENC_PIC_PARAMS params = { .version = NV_ENC_PIC_PARAMS_VER,
1972  .encodePicFlags = NV_ENC_PIC_FLAG_EOS };
1973 
1974  res = nvenc_push_context(avctx);
1975  if (res < 0)
1976  return res;
1977 
1978  p_nvenc->nvEncEncodePicture(ctx->nvencoder, &params);
1979  }
1980 
1981  av_fifo_freep2(&ctx->timestamp_list);
1982  av_fifo_freep2(&ctx->output_surface_ready_queue);
1983  av_fifo_freep2(&ctx->output_surface_queue);
1984  av_fifo_freep2(&ctx->unused_surface_queue);
1985 
1986  if (ctx->frame_data_array) {
1987  for (i = 0; i < ctx->nb_surfaces; i++)
1988  av_buffer_unref(&ctx->frame_data_array[i].frame_opaque_ref);
1989  av_freep(&ctx->frame_data_array);
1990  }
1991 
1992  if (ctx->surfaces && (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11)) {
1993  for (i = 0; i < ctx->nb_registered_frames; i++) {
1994  if (ctx->registered_frames[i].mapped)
1995  p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[i].in_map.mappedResource);
1996  if (ctx->registered_frames[i].regptr)
1997  p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
1998  }
1999  ctx->nb_registered_frames = 0;
2000  }
2001 
2002  if (ctx->surfaces) {
2003  for (i = 0; i < ctx->nb_surfaces; ++i) {
2004  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
2005  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[i].input_surface);
2006  av_frame_free(&ctx->surfaces[i].in_ref);
2007  p_nvenc->nvEncDestroyBitstreamBuffer(ctx->nvencoder, ctx->surfaces[i].output_surface);
2008  }
2009  }
2010  av_freep(&ctx->surfaces);
2011  ctx->nb_surfaces = 0;
2012 
2013  av_frame_free(&ctx->frame);
2014 
2015  av_freep(&ctx->sei_data);
2016 
2017  if (ctx->nvencoder) {
2018  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
2019 
2020  res = nvenc_pop_context(avctx);
2021  if (res < 0)
2022  return res;
2023  }
2024  ctx->nvencoder = NULL;
2025 
2026  if (ctx->cu_context_internal)
2027  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
2028  ctx->cu_context = ctx->cu_context_internal = NULL;
2029 
2030 #if CONFIG_D3D11VA
2031  if (ctx->d3d11_device) {
2032  ID3D11Device_Release(ctx->d3d11_device);
2033  ctx->d3d11_device = NULL;
2034  }
2035 #endif
2036 
2037  nvenc_free_functions(&dl_fn->nvenc_dl);
2038  cuda_free_functions(&dl_fn->cuda_dl);
2039 
2040  dl_fn->nvenc_device_count = 0;
2041 
2042  av_log(avctx, AV_LOG_VERBOSE, "Nvenc unloaded\n");
2043 
2044  return 0;
2045 }
2046 
2048 {
2049  NvencContext *ctx = avctx->priv_data;
2050  int ret;
2051 
2052  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2053  AVHWFramesContext *frames_ctx;
2054  if (!avctx->hw_frames_ctx) {
2055  av_log(avctx, AV_LOG_ERROR,
2056  "hw_frames_ctx must be set when using GPU frames as input\n");
2057  return AVERROR(EINVAL);
2058  }
2059  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
2060  if (frames_ctx->format != avctx->pix_fmt) {
2061  av_log(avctx, AV_LOG_ERROR,
2062  "hw_frames_ctx must match the GPU frame type\n");
2063  return AVERROR(EINVAL);
2064  }
2065  ctx->data_pix_fmt = frames_ctx->sw_format;
2066  } else {
2067  ctx->data_pix_fmt = avctx->pix_fmt;
2068  }
2069 
2070  if (ctx->rgb_mode == NVENC_RGB_MODE_DISABLED && IS_RGB(ctx->data_pix_fmt)) {
2071  av_log(avctx, AV_LOG_ERROR, "Packed RGB input, but RGB support is disabled.\n");
2072  return AVERROR(EINVAL);
2073  }
2074 
2075  ctx->frame = av_frame_alloc();
2076  if (!ctx->frame)
2077  return AVERROR(ENOMEM);
2078 
2079  if ((ret = nvenc_load_libraries(avctx)) < 0)
2080  return ret;
2081 
2082  if ((ret = nvenc_setup_device(avctx)) < 0)
2083  return ret;
2084 
2085  if ((ret = nvenc_setup_encoder(avctx)) < 0)
2086  return ret;
2087 
2088  if ((ret = nvenc_setup_surfaces(avctx)) < 0)
2089  return ret;
2090 
2091  if (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) {
2092  if ((ret = nvenc_setup_extradata(avctx)) < 0)
2093  return ret;
2094  }
2095 
2096  return 0;
2097 }
2098 
2100 {
2101  NvencSurface *tmp_surf;
2102 
2103  if (av_fifo_read(ctx->unused_surface_queue, &tmp_surf, 1) < 0)
2104  // queue empty
2105  return NULL;
2106 
2107  return tmp_surf;
2108 }
2109 
2110 static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface,
2111  NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
2112 {
2113  int dst_linesize[4] = {
2114  lock_buffer_params->pitch,
2115  lock_buffer_params->pitch,
2116  lock_buffer_params->pitch,
2117  lock_buffer_params->pitch
2118  };
2119  uint8_t *dst_data[4];
2120  int ret;
2121 
2122  if (frame->format == AV_PIX_FMT_YUV420P)
2123  dst_linesize[1] = dst_linesize[2] >>= 1;
2124 
2125  ret = av_image_fill_pointers(dst_data, frame->format, nv_surface->height,
2126  lock_buffer_params->bufferDataPtr, dst_linesize);
2127  if (ret < 0)
2128  return ret;
2129 
2130  if (frame->format == AV_PIX_FMT_YUV420P)
2131  FFSWAP(uint8_t*, dst_data[1], dst_data[2]);
2132 
2133  av_image_copy2(dst_data, dst_linesize,
2134  frame->data, frame->linesize, frame->format,
2135  avctx->width, avctx->height);
2136 
2137  return 0;
2138 }
2139 
2141 {
2142  NvencContext *ctx = avctx->priv_data;
2143  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2144  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2145  NVENCSTATUS nv_status;
2146 
2147  int i, first_round;
2148 
2149  if (ctx->nb_registered_frames == FF_ARRAY_ELEMS(ctx->registered_frames)) {
2150  for (first_round = 1; first_round >= 0; first_round--) {
2151  for (i = 0; i < ctx->nb_registered_frames; i++) {
2152  if (!ctx->registered_frames[i].mapped) {
2153  if (ctx->registered_frames[i].regptr) {
2154  if (first_round)
2155  continue;
2156  nv_status = p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
2157  if (nv_status != NV_ENC_SUCCESS)
2158  return nvenc_print_error(avctx, nv_status, "Failed unregistering unused input resource");
2159  ctx->registered_frames[i].ptr = NULL;
2160  ctx->registered_frames[i].regptr = NULL;
2161  }
2162  return i;
2163  }
2164  }
2165  }
2166  } else {
2167  return ctx->nb_registered_frames++;
2168  }
2169 
2170  av_log(avctx, AV_LOG_ERROR, "Too many registered CUDA frames\n");
2171  return AVERROR(ENOMEM);
2172 }
2173 
2175 {
2176  NvencContext *ctx = avctx->priv_data;
2177  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2178  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2179 
2180  AVHWFramesContext *frames_ctx = (AVHWFramesContext*)frame->hw_frames_ctx->data;
2181  NV_ENC_REGISTER_RESOURCE reg = { 0 };
2182  int i, idx, ret;
2183 
2184  for (i = 0; i < ctx->nb_registered_frames; i++) {
2185  if (avctx->pix_fmt == AV_PIX_FMT_CUDA && ctx->registered_frames[i].ptr == frame->data[0])
2186  return i;
2187  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11 && ctx->registered_frames[i].ptr == frame->data[0] && ctx->registered_frames[i].ptr_index == (intptr_t)frame->data[1])
2188  return i;
2189  }
2190 
2191  idx = nvenc_find_free_reg_resource(avctx);
2192  if (idx < 0)
2193  return idx;
2194 
2195  reg.version = NV_ENC_REGISTER_RESOURCE_VER;
2196  reg.width = frames_ctx->width;
2197  reg.height = frames_ctx->height;
2198  reg.pitch = frame->linesize[0];
2199  reg.resourceToRegister = frame->data[0];
2200 
2201  if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
2202  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_CUDADEVICEPTR;
2203  }
2204  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2205  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_DIRECTX;
2206  reg.subResourceIndex = (intptr_t)frame->data[1];
2207  }
2208 
2209  reg.bufferFormat = nvenc_map_buffer_format(frames_ctx->sw_format);
2210  if (reg.bufferFormat == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
2211  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
2212  av_get_pix_fmt_name(frames_ctx->sw_format));
2213  return AVERROR(EINVAL);
2214  }
2215 
2216  ret = p_nvenc->nvEncRegisterResource(ctx->nvencoder, &reg);
2217  if (ret != NV_ENC_SUCCESS) {
2218  nvenc_print_error(avctx, ret, "Error registering an input resource");
2219  return AVERROR_UNKNOWN;
2220  }
2221 
2222  ctx->registered_frames[idx].ptr = frame->data[0];
2223  ctx->registered_frames[idx].ptr_index = reg.subResourceIndex;
2224  ctx->registered_frames[idx].regptr = reg.registeredResource;
2225  return idx;
2226 }
2227 
2229  NvencSurface *nvenc_frame)
2230 {
2231  NvencContext *ctx = avctx->priv_data;
2232  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2233  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2234 
2235  int res;
2236  NVENCSTATUS nv_status;
2237 
2238  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2239  int reg_idx = nvenc_register_frame(avctx, frame);
2240  if (reg_idx < 0) {
2241  av_log(avctx, AV_LOG_ERROR, "Could not register an input HW frame\n");
2242  return reg_idx;
2243  }
2244 
2245  res = av_frame_ref(nvenc_frame->in_ref, frame);
2246  if (res < 0)
2247  return res;
2248 
2249  if (!ctx->registered_frames[reg_idx].mapped) {
2250  ctx->registered_frames[reg_idx].in_map.version = NV_ENC_MAP_INPUT_RESOURCE_VER;
2251  ctx->registered_frames[reg_idx].in_map.registeredResource = ctx->registered_frames[reg_idx].regptr;
2252  nv_status = p_nvenc->nvEncMapInputResource(ctx->nvencoder, &ctx->registered_frames[reg_idx].in_map);
2253  if (nv_status != NV_ENC_SUCCESS) {
2254  av_frame_unref(nvenc_frame->in_ref);
2255  return nvenc_print_error(avctx, nv_status, "Error mapping an input resource");
2256  }
2257  }
2258 
2259  ctx->registered_frames[reg_idx].mapped += 1;
2260 
2261  nvenc_frame->reg_idx = reg_idx;
2262  nvenc_frame->input_surface = ctx->registered_frames[reg_idx].in_map.mappedResource;
2263  nvenc_frame->format = ctx->registered_frames[reg_idx].in_map.mappedBufferFmt;
2264  nvenc_frame->pitch = frame->linesize[0];
2265 
2266  return 0;
2267  } else {
2268  NV_ENC_LOCK_INPUT_BUFFER lockBufferParams = { 0 };
2269 
2270  lockBufferParams.version = NV_ENC_LOCK_INPUT_BUFFER_VER;
2271  lockBufferParams.inputBuffer = nvenc_frame->input_surface;
2272 
2273  nv_status = p_nvenc->nvEncLockInputBuffer(ctx->nvencoder, &lockBufferParams);
2274  if (nv_status != NV_ENC_SUCCESS) {
2275  return nvenc_print_error(avctx, nv_status, "Failed locking nvenc input buffer");
2276  }
2277 
2278  nvenc_frame->pitch = lockBufferParams.pitch;
2279  res = nvenc_copy_frame(avctx, nvenc_frame, &lockBufferParams, frame);
2280 
2281  nv_status = p_nvenc->nvEncUnlockInputBuffer(ctx->nvencoder, nvenc_frame->input_surface);
2282  if (nv_status != NV_ENC_SUCCESS) {
2283  return nvenc_print_error(avctx, nv_status, "Failed unlocking input buffer!");
2284  }
2285 
2286  return res;
2287  }
2288 }
2289 
2291  NV_ENC_PIC_PARAMS *params,
2292  NV_ENC_SEI_PAYLOAD *sei_data,
2293  int sei_count)
2294 {
2295  NvencContext *ctx = avctx->priv_data;
2296 
2297  switch (avctx->codec->id) {
2298  case AV_CODEC_ID_H264:
2299  params->codecPicParams.h264PicParams.sliceMode =
2300  ctx->encode_config.encodeCodecConfig.h264Config.sliceMode;
2301  params->codecPicParams.h264PicParams.sliceModeData =
2302  ctx->encode_config.encodeCodecConfig.h264Config.sliceModeData;
2303  if (sei_count > 0) {
2304  params->codecPicParams.h264PicParams.seiPayloadArray = sei_data;
2305  params->codecPicParams.h264PicParams.seiPayloadArrayCnt = sei_count;
2306  }
2307 
2308  break;
2309  case AV_CODEC_ID_HEVC:
2310  params->codecPicParams.hevcPicParams.sliceMode =
2311  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceMode;
2312  params->codecPicParams.hevcPicParams.sliceModeData =
2313  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceModeData;
2314  if (sei_count > 0) {
2315  params->codecPicParams.hevcPicParams.seiPayloadArray = sei_data;
2316  params->codecPicParams.hevcPicParams.seiPayloadArrayCnt = sei_count;
2317  }
2318 
2319  break;
2320 #if CONFIG_AV1_NVENC_ENCODER
2321  case AV_CODEC_ID_AV1:
2322  params->codecPicParams.av1PicParams.numTileColumns =
2323  ctx->encode_config.encodeCodecConfig.av1Config.numTileColumns;
2324  params->codecPicParams.av1PicParams.numTileRows =
2325  ctx->encode_config.encodeCodecConfig.av1Config.numTileRows;
2326  if (sei_count > 0) {
2327  params->codecPicParams.av1PicParams.obuPayloadArray = sei_data;
2328  params->codecPicParams.av1PicParams.obuPayloadArrayCnt = sei_count;
2329  }
2330 
2331  break;
2332 #endif
2333  }
2334 }
2335 
2336 static inline void timestamp_queue_enqueue(AVFifo *queue, int64_t timestamp)
2337 {
2338  av_fifo_write(queue, &timestamp, 1);
2339 }
2340 
2341 static inline int64_t timestamp_queue_dequeue(AVFifo *queue)
2342 {
2343  int64_t timestamp = AV_NOPTS_VALUE;
2344  // The following call might fail if the queue is empty.
2345  av_fifo_read(queue, &timestamp, 1);
2346 
2347  return timestamp;
2348 }
2349 
2351  NV_ENC_LOCK_BITSTREAM *params,
2352  AVPacket *pkt)
2353 {
2354  NvencContext *ctx = avctx->priv_data;
2355 
2356  pkt->pts = params->outputTimeStamp;
2357 
2360  pkt->dts = timestamp_queue_dequeue(ctx->timestamp_list) -
2361 #if FF_API_TICKS_PER_FRAME
2362  FFMAX(avctx->ticks_per_frame, 1) *
2363 #endif
2364  FFMAX(ctx->encode_config.frameIntervalP - 1, 0);
2366  } else {
2367  pkt->dts = pkt->pts;
2368  }
2369 
2370  return 0;
2371 }
2372 
2373 static int nvenc_store_frame_data(AVCodecContext *avctx, NV_ENC_PIC_PARAMS *pic_params, const AVFrame *frame)
2374 {
2375  NvencContext *ctx = avctx->priv_data;
2376  int res = 0;
2377 
2378  int idx = ctx->frame_data_array_pos;
2379  NvencFrameData *frame_data = &ctx->frame_data_array[idx];
2380 
2381  // in case the encoder got reconfigured, there might be leftovers
2383 
2384  if (frame->opaque_ref && avctx->flags & AV_CODEC_FLAG_COPY_OPAQUE) {
2387  return AVERROR(ENOMEM);
2388  }
2389 
2390  frame_data->duration = frame->duration;
2391  frame_data->frame_opaque = frame->opaque;
2392 
2393  ctx->frame_data_array_pos = (ctx->frame_data_array_pos + 1) % ctx->frame_data_array_nb;
2394  pic_params->inputDuration = idx;
2395 
2396  return res;
2397 }
2398 
2399 static int nvenc_retrieve_frame_data(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *lock_params, AVPacket *pkt)
2400 {
2401  NvencContext *ctx = avctx->priv_data;
2402  int res = 0;
2403 
2404  int idx = lock_params->outputDuration;
2405  NvencFrameData *frame_data = &ctx->frame_data_array[idx];
2406 
2408 
2409  if (avctx->flags & AV_CODEC_FLAG_COPY_OPAQUE) {
2413  }
2414 
2416 
2417  return res;
2418 }
2419 
2421 {
2422  NvencContext *ctx = avctx->priv_data;
2423  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2424  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2425 
2426  NV_ENC_LOCK_BITSTREAM lock_params = { 0 };
2427  NVENCSTATUS nv_status;
2428  int res = 0;
2429 
2430  enum AVPictureType pict_type;
2431 
2432  lock_params.version = NV_ENC_LOCK_BITSTREAM_VER;
2433 
2434  lock_params.doNotWait = 0;
2435  lock_params.outputBitstream = tmpoutsurf->output_surface;
2436 
2437  nv_status = p_nvenc->nvEncLockBitstream(ctx->nvencoder, &lock_params);
2438  if (nv_status != NV_ENC_SUCCESS) {
2439  res = nvenc_print_error(avctx, nv_status, "Failed locking bitstream buffer");
2440  goto error;
2441  }
2442 
2443  res = ff_get_encode_buffer(avctx, pkt, lock_params.bitstreamSizeInBytes, 0);
2444 
2445  if (res < 0) {
2446  p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
2447  goto error;
2448  }
2449 
2450  memcpy(pkt->data, lock_params.bitstreamBufferPtr, lock_params.bitstreamSizeInBytes);
2451 
2452  nv_status = p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
2453  if (nv_status != NV_ENC_SUCCESS) {
2454  res = nvenc_print_error(avctx, nv_status, "Failed unlocking bitstream buffer, expect the gates of mordor to open");
2455  goto error;
2456  }
2457 
2458 
2459  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2460  ctx->registered_frames[tmpoutsurf->reg_idx].mapped -= 1;
2461  if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped == 0) {
2462  nv_status = p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[tmpoutsurf->reg_idx].in_map.mappedResource);
2463  if (nv_status != NV_ENC_SUCCESS) {
2464  res = nvenc_print_error(avctx, nv_status, "Failed unmapping input resource");
2465  goto error;
2466  }
2467  } else if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped < 0) {
2468  res = AVERROR_BUG;
2469  goto error;
2470  }
2471 
2472  av_frame_unref(tmpoutsurf->in_ref);
2473 
2474  tmpoutsurf->input_surface = NULL;
2475  }
2476 
2477  switch (lock_params.pictureType) {
2478  case NV_ENC_PIC_TYPE_IDR:
2480  case NV_ENC_PIC_TYPE_I:
2481  pict_type = AV_PICTURE_TYPE_I;
2482  break;
2483  case NV_ENC_PIC_TYPE_P:
2484  pict_type = AV_PICTURE_TYPE_P;
2485  break;
2486  case NV_ENC_PIC_TYPE_B:
2487  pict_type = AV_PICTURE_TYPE_B;
2488  break;
2489  case NV_ENC_PIC_TYPE_BI:
2490  pict_type = AV_PICTURE_TYPE_BI;
2491  break;
2492  default:
2493  av_log(avctx, AV_LOG_ERROR, "Unknown picture type encountered, expect the output to be broken.\n");
2494  av_log(avctx, AV_LOG_ERROR, "Please report this error and include as much information on how to reproduce it as possible.\n");
2495  res = AVERROR_EXTERNAL;
2496  goto error;
2497  }
2498 
2500  (lock_params.frameAvgQP - 1) * FF_QP2LAMBDA, NULL, 0, pict_type);
2501 
2502  res = nvenc_set_timestamp(avctx, &lock_params, pkt);
2503  if (res < 0)
2504  goto error2;
2505 
2506  res = nvenc_retrieve_frame_data(avctx, &lock_params, pkt);
2507  if (res < 0)
2508  goto error2;
2509 
2510  return 0;
2511 
2512 error:
2513  timestamp_queue_dequeue(ctx->timestamp_list);
2514 
2515 error2:
2516  return res;
2517 }
2518 
2519 static int output_ready(AVCodecContext *avctx, int flush)
2520 {
2521  NvencContext *ctx = avctx->priv_data;
2522  int nb_ready, nb_pending;
2523 
2524  nb_ready = av_fifo_can_read(ctx->output_surface_ready_queue);
2525  nb_pending = av_fifo_can_read(ctx->output_surface_queue);
2526  if (flush)
2527  return nb_ready > 0;
2528  return (nb_ready > 0) && (nb_ready + nb_pending >= ctx->async_depth);
2529 }
2530 
2532 {
2533  NvencContext *ctx = avctx->priv_data;
2534  int sei_count = 0;
2535  int i, res;
2536 
2538  void *a53_data = NULL;
2539  size_t a53_size = 0;
2540 
2541  if (ff_alloc_a53_sei(frame, 0, &a53_data, &a53_size) < 0) {
2542  av_log(ctx, AV_LOG_ERROR, "Not enough memory for closed captions, skipping\n");
2543  }
2544 
2545  if (a53_data) {
2546  void *tmp = av_fast_realloc(ctx->sei_data,
2547  &ctx->sei_data_size,
2548  (sei_count + 1) * sizeof(*ctx->sei_data));
2549  if (!tmp) {
2550  av_free(a53_data);
2551  res = AVERROR(ENOMEM);
2552  goto error;
2553  } else {
2554  ctx->sei_data = tmp;
2555  ctx->sei_data[sei_count].payloadSize = (uint32_t)a53_size;
2556  ctx->sei_data[sei_count].payload = (uint8_t*)a53_data;
2557 
2558 #if CONFIG_AV1_NVENC_ENCODER
2559  if (avctx->codec->id == AV_CODEC_ID_AV1)
2560  ctx->sei_data[sei_count].payloadType = AV1_METADATA_TYPE_ITUT_T35;
2561  else
2562 #endif
2563  ctx->sei_data[sei_count].payloadType = SEI_TYPE_USER_DATA_REGISTERED_ITU_T_T35;
2564 
2565  sei_count++;
2566  }
2567  }
2568  }
2569 
2571  void *tc_data = NULL;
2572  size_t tc_size = 0;
2573 
2574  if (ff_alloc_timecode_sei(frame, avctx->framerate, 0, &tc_data, &tc_size) < 0) {
2575  av_log(ctx, AV_LOG_ERROR, "Not enough memory for timecode sei, skipping\n");
2576  }
2577 
2578  if (tc_data) {
2579  void *tmp = av_fast_realloc(ctx->sei_data,
2580  &ctx->sei_data_size,
2581  (sei_count + 1) * sizeof(*ctx->sei_data));
2582  if (!tmp) {
2583  av_free(tc_data);
2584  res = AVERROR(ENOMEM);
2585  goto error;
2586  } else {
2587  ctx->sei_data = tmp;
2588  ctx->sei_data[sei_count].payloadSize = (uint32_t)tc_size;
2589  ctx->sei_data[sei_count].payload = (uint8_t*)tc_data;
2590 
2591 #if CONFIG_AV1_NVENC_ENCODER
2592  if (avctx->codec->id == AV_CODEC_ID_AV1)
2593  ctx->sei_data[sei_count].payloadType = AV1_METADATA_TYPE_TIMECODE;
2594  else
2595 #endif
2596  ctx->sei_data[sei_count].payloadType = SEI_TYPE_TIME_CODE;
2597 
2598  sei_count++;
2599  }
2600  }
2601  }
2602 
2603  if (!ctx->udu_sei)
2604  return sei_count;
2605 
2606  for (i = 0; i < frame->nb_side_data; i++) {
2607  AVFrameSideData *side_data = frame->side_data[i];
2608  void *tmp;
2609 
2610  if (side_data->type != AV_FRAME_DATA_SEI_UNREGISTERED)
2611  continue;
2612 
2613  tmp = av_fast_realloc(ctx->sei_data,
2614  &ctx->sei_data_size,
2615  (sei_count + 1) * sizeof(*ctx->sei_data));
2616  if (!tmp) {
2617  res = AVERROR(ENOMEM);
2618  goto error;
2619  } else {
2620  ctx->sei_data = tmp;
2621  ctx->sei_data[sei_count].payloadSize = side_data->size;
2622  ctx->sei_data[sei_count].payloadType = SEI_TYPE_USER_DATA_UNREGISTERED;
2623  ctx->sei_data[sei_count].payload = av_memdup(side_data->data, side_data->size);
2624 
2625  if (!ctx->sei_data[sei_count].payload) {
2626  res = AVERROR(ENOMEM);
2627  goto error;
2628  }
2629 
2630  sei_count++;
2631  }
2632  }
2633 
2634  return sei_count;
2635 
2636 error:
2637  for (i = 0; i < sei_count; i++)
2638  av_freep(&(ctx->sei_data[i].payload));
2639 
2640  return res;
2641 }
2642 
2643 static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
2644 {
2645  NvencContext *ctx = avctx->priv_data;
2646  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
2647  NVENCSTATUS ret;
2648 
2649  NV_ENC_RECONFIGURE_PARAMS params = { 0 };
2650  int needs_reconfig = 0;
2651  int needs_encode_config = 0;
2652  int reconfig_bitrate = 0, reconfig_dar = 0;
2653  int dw, dh;
2654 
2655  params.version = NV_ENC_RECONFIGURE_PARAMS_VER;
2656  params.reInitEncodeParams = ctx->init_encode_params;
2657 
2658  compute_dar(avctx, &dw, &dh);
2659  if (dw != ctx->init_encode_params.darWidth || dh != ctx->init_encode_params.darHeight) {
2660  av_log(avctx, AV_LOG_VERBOSE,
2661  "aspect ratio change (DAR): %d:%d -> %d:%d\n",
2662  ctx->init_encode_params.darWidth,
2663  ctx->init_encode_params.darHeight, dw, dh);
2664 
2665  params.reInitEncodeParams.darHeight = dh;
2666  params.reInitEncodeParams.darWidth = dw;
2667 
2668  needs_reconfig = 1;
2669  reconfig_dar = 1;
2670  }
2671 
2672  if (ctx->rc != NV_ENC_PARAMS_RC_CONSTQP && ctx->support_dyn_bitrate) {
2673  if (avctx->bit_rate > 0 && params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate != avctx->bit_rate) {
2674  av_log(avctx, AV_LOG_VERBOSE,
2675  "avg bitrate change: %d -> %d\n",
2676  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate,
2677  (uint32_t)avctx->bit_rate);
2678 
2679  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate = avctx->bit_rate;
2680  reconfig_bitrate = 1;
2681  }
2682 
2683  if (avctx->rc_max_rate > 0 && ctx->encode_config.rcParams.maxBitRate != avctx->rc_max_rate) {
2684  av_log(avctx, AV_LOG_VERBOSE,
2685  "max bitrate change: %d -> %d\n",
2686  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate,
2687  (uint32_t)avctx->rc_max_rate);
2688 
2689  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate = avctx->rc_max_rate;
2690  reconfig_bitrate = 1;
2691  }
2692 
2693  if (avctx->rc_buffer_size > 0 && ctx->encode_config.rcParams.vbvBufferSize != avctx->rc_buffer_size) {
2694  av_log(avctx, AV_LOG_VERBOSE,
2695  "vbv buffer size change: %d -> %d\n",
2696  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize,
2697  avctx->rc_buffer_size);
2698 
2699  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize = avctx->rc_buffer_size;
2700  reconfig_bitrate = 1;
2701  }
2702 
2703  if (reconfig_bitrate) {
2704  params.resetEncoder = 1;
2705  params.forceIDR = 1;
2706 
2707  needs_encode_config = 1;
2708  needs_reconfig = 1;
2709  }
2710  }
2711 
2712  if (!needs_encode_config)
2713  params.reInitEncodeParams.encodeConfig = NULL;
2714 
2715  if (needs_reconfig) {
2716  ret = p_nvenc->nvEncReconfigureEncoder(ctx->nvencoder, &params);
2717  if (ret != NV_ENC_SUCCESS) {
2718  nvenc_print_error(avctx, ret, "failed to reconfigure nvenc");
2719  } else {
2720  if (reconfig_dar) {
2721  ctx->init_encode_params.darHeight = dh;
2722  ctx->init_encode_params.darWidth = dw;
2723  }
2724 
2725  if (reconfig_bitrate) {
2726  ctx->encode_config.rcParams.averageBitRate = params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate;
2727  ctx->encode_config.rcParams.maxBitRate = params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate;
2728  ctx->encode_config.rcParams.vbvBufferSize = params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize;
2729  }
2730 
2731  }
2732  }
2733 }
2734 
2735 static int nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
2736 {
2737  NVENCSTATUS nv_status;
2738  NvencSurface *tmp_out_surf, *in_surf;
2739  int res, res2;
2740  int sei_count = 0;
2741  int i;
2742 
2743  NvencContext *ctx = avctx->priv_data;
2744  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2745  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2746 
2747  NV_ENC_PIC_PARAMS pic_params = { 0 };
2748  pic_params.version = NV_ENC_PIC_PARAMS_VER;
2749 
2750  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
2751  return AVERROR(EINVAL);
2752 
2753  if (frame && frame->buf[0]) {
2754  in_surf = get_free_frame(ctx);
2755  if (!in_surf)
2756  return AVERROR(EAGAIN);
2757 
2758  res = nvenc_push_context(avctx);
2759  if (res < 0)
2760  return res;
2761 
2762  reconfig_encoder(avctx, frame);
2763 
2764  res = nvenc_upload_frame(avctx, frame, in_surf);
2765 
2766  res2 = nvenc_pop_context(avctx);
2767  if (res2 < 0)
2768  return res2;
2769 
2770  if (res)
2771  return res;
2772 
2773  pic_params.inputBuffer = in_surf->input_surface;
2774  pic_params.bufferFmt = in_surf->format;
2775  pic_params.inputWidth = in_surf->width;
2776  pic_params.inputHeight = in_surf->height;
2777  pic_params.inputPitch = in_surf->pitch;
2778  pic_params.outputBitstream = in_surf->output_surface;
2779 
2780  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
2781  if (frame->flags & AV_FRAME_FLAG_TOP_FIELD_FIRST)
2782  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_TOP_BOTTOM;
2783  else
2784  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_BOTTOM_TOP;
2785  } else {
2786  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FRAME;
2787  }
2788 
2789  if (ctx->forced_idr >= 0 && frame->pict_type == AV_PICTURE_TYPE_I) {
2790  pic_params.encodePicFlags =
2791  ctx->forced_idr ? NV_ENC_PIC_FLAG_FORCEIDR : NV_ENC_PIC_FLAG_FORCEINTRA;
2792  } else {
2793  pic_params.encodePicFlags = 0;
2794  }
2795 
2796  pic_params.frameIdx = ctx->frame_idx_counter++;
2797  pic_params.inputTimeStamp = frame->pts;
2798 
2799  if (ctx->extra_sei) {
2800  res = prepare_sei_data_array(avctx, frame);
2801  if (res < 0)
2802  return res;
2803  sei_count = res;
2804  }
2805 
2806  res = nvenc_store_frame_data(avctx, &pic_params, frame);
2807  if (res < 0)
2808  return res;
2809 
2810  nvenc_codec_specific_pic_params(avctx, &pic_params, ctx->sei_data, sei_count);
2811  } else {
2812  pic_params.encodePicFlags = NV_ENC_PIC_FLAG_EOS;
2813  }
2814 
2815  res = nvenc_push_context(avctx);
2816  if (res < 0)
2817  return res;
2818 
2819  nv_status = p_nvenc->nvEncEncodePicture(ctx->nvencoder, &pic_params);
2820 
2821  for (i = 0; i < sei_count; i++)
2822  av_freep(&(ctx->sei_data[i].payload));
2823 
2824  res = nvenc_pop_context(avctx);
2825  if (res < 0)
2826  return res;
2827 
2828  if (nv_status != NV_ENC_SUCCESS &&
2829  nv_status != NV_ENC_ERR_NEED_MORE_INPUT)
2830  return nvenc_print_error(avctx, nv_status, "EncodePicture failed!");
2831 
2832  if (frame && frame->buf[0]) {
2833  av_fifo_write(ctx->output_surface_queue, &in_surf, 1);
2834 
2836  timestamp_queue_enqueue(ctx->timestamp_list, frame->pts);
2837  }
2838 
2839  /* all the pending buffers are now ready for output */
2840  if (nv_status == NV_ENC_SUCCESS) {
2841  while (av_fifo_read(ctx->output_surface_queue, &tmp_out_surf, 1) >= 0)
2842  av_fifo_write(ctx->output_surface_ready_queue, &tmp_out_surf, 1);
2843  }
2844 
2845  return 0;
2846 }
2847 
2849 {
2850  NvencSurface *tmp_out_surf;
2851  int res, res2;
2852 
2853  NvencContext *ctx = avctx->priv_data;
2854 
2855  AVFrame *frame = ctx->frame;
2856 
2857  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
2858  return AVERROR(EINVAL);
2859 
2860  if (!frame->buf[0]) {
2861  res = ff_encode_get_frame(avctx, frame);
2862  if (res < 0 && res != AVERROR_EOF)
2863  return res;
2864  }
2865 
2866  res = nvenc_send_frame(avctx, frame);
2867  if (res < 0) {
2868  if (res != AVERROR(EAGAIN))
2869  return res;
2870  } else
2872 
2873  if (output_ready(avctx, avctx->internal->draining)) {
2874  av_fifo_read(ctx->output_surface_ready_queue, &tmp_out_surf, 1);
2875 
2876  res = nvenc_push_context(avctx);
2877  if (res < 0)
2878  return res;
2879 
2880  res = process_output_surface(avctx, pkt, tmp_out_surf);
2881 
2882  res2 = nvenc_pop_context(avctx);
2883  if (res2 < 0)
2884  return res2;
2885 
2886  if (res)
2887  return res;
2888 
2889  av_fifo_write(ctx->unused_surface_queue, &tmp_out_surf, 1);
2890  } else if (avctx->internal->draining) {
2891  return AVERROR_EOF;
2892  } else {
2893  return AVERROR(EAGAIN);
2894  }
2895 
2896  return 0;
2897 }
2898 
2900 {
2901  NvencContext *ctx = avctx->priv_data;
2902 
2903  nvenc_send_frame(avctx, NULL);
2904  av_fifo_reset2(ctx->timestamp_list);
2905 }
error
static void error(const char *err)
Definition: target_bsf_fuzzer.c:32
AVHWDeviceContext::hwctx
void * hwctx
The format-specific data, allocated and freed by libavutil along with this context.
Definition: hwcontext.h:85
FF_ENABLE_DEPRECATION_WARNINGS
#define FF_ENABLE_DEPRECATION_WARNINGS
Definition: internal.h:73
NVENC_ONE_PASS
@ NVENC_ONE_PASS
Definition: nvenc.h:166
ff_alloc_a53_sei
int ff_alloc_a53_sei(const AVFrame *frame, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for A53 side data and allocate and fill SEI message with A53 info.
Definition: atsc_a53.c:26
NV_ENC_H264_PROFILE_BASELINE
@ NV_ENC_H264_PROFILE_BASELINE
Definition: nvenc.h:151
AV_LOG_WARNING
#define AV_LOG_WARNING
Something somehow does not look correct.
Definition: log.h:186
PRESET_ALIAS
#define PRESET_ALIAS(alias, name,...)
Definition: nvenc.c:184
AV_PIX_FMT_CUDA
@ AV_PIX_FMT_CUDA
HW acceleration through CUDA.
Definition: pixfmt.h:260
AVPixelFormat
AVPixelFormat
Pixel format.
Definition: pixfmt.h:71
name
it s the only field you need to keep assuming you have a context There is some magic you don t need to care about around this just let it vf default minimum maximum flags name is the option name
Definition: writing_filters.txt:88
GUIDTuple::guid
const GUID guid
Definition: nvenc.c:180
level
uint8_t level
Definition: svq3.c:205
av_clip
#define av_clip
Definition: common.h:100
AVERROR
Filter the word “frame” indicates either a video frame or a group of audio as stored in an AVFrame structure Format for each input and each output the list of supported formats For video that means pixel format For audio that means channel sample they are references to shared objects When the negotiation mechanism computes the intersection of the formats supported at each end of a all references to both lists are replaced with a reference to the intersection And when a single format is eventually chosen for a link amongst the remaining all references to the list are updated That means that if a filter requires that its input and output have the same format amongst a supported all it has to do is use a reference to the same list of formats query_formats can leave some formats unset and return AVERROR(EAGAIN) to cause the negotiation mechanism toagain later. That can be used by filters with complex requirements to use the format negotiated on one link to set the formats supported on another. Frame references ownership and permissions
AVCodecContext::colorspace
enum AVColorSpace colorspace
YUV colorspace type.
Definition: avcodec.h:685
av_frame_get_side_data
AVFrameSideData * av_frame_get_side_data(const AVFrame *frame, enum AVFrameSideDataType type)
Definition: frame.c:947
AV_PIX_FMT_BGR32
#define AV_PIX_FMT_BGR32
Definition: pixfmt.h:453
GUIDTuple
Definition: nvenc.c:179
NONE
@ NONE
Definition: af_afade.c:61
GUIDTuple::flags
int flags
Definition: nvenc.c:181
av_pix_fmt_desc_get
const AVPixFmtDescriptor * av_pix_fmt_desc_get(enum AVPixelFormat pix_fmt)
Definition: pixdesc.c:2965
AVERROR_EOF
#define AVERROR_EOF
End of file.
Definition: error.h:57
AVBufferRef::data
uint8_t * data
The data buffer.
Definition: buffer.h:90
AV_FRAME_DATA_A53_CC
@ AV_FRAME_DATA_A53_CC
ATSC A53 Part 4 Closed Captions.
Definition: frame.h:59
AV_PROFILE_H264_MAIN
#define AV_PROFILE_H264_MAIN
Definition: defs.h:112
nvenc_push_context
static int nvenc_push_context(AVCodecContext *avctx)
Definition: nvenc.c:361
AVHWFramesContext::format
enum AVPixelFormat format
The pixel format identifying the underlying HW surface type.
Definition: hwcontext.h:197
AVPictureType
AVPictureType
Definition: avutil.h:277
output_ready
static int output_ready(AVCodecContext *avctx, int flush)
Definition: nvenc.c:2519
NvencContext
Definition: nvenc.h:183
AVCodecContext::codec_descriptor
const struct AVCodecDescriptor * codec_descriptor
AVCodecDescriptor.
Definition: avcodec.h:1862
AV_FRAME_DATA_S12M_TIMECODE
@ AV_FRAME_DATA_S12M_TIMECODE
Timecode which conforms to SMPTE ST 12-1.
Definition: frame.h:152
AV_PROFILE_HEVC_MAIN
#define AV_PROFILE_HEVC_MAIN
Definition: defs.h:159
NvencSurface::in_ref
AVFrame * in_ref
Definition: nvenc.h:99
av_frame_free
void av_frame_free(AVFrame **frame)
Free the frame and any dynamically allocated objects in it, e.g.
Definition: frame.c:160
nvenc_store_frame_data
static int nvenc_store_frame_data(AVCodecContext *avctx, NV_ENC_PIC_PARAMS *pic_params, const AVFrame *frame)
Definition: nvenc.c:2373
AVFrame
This structure describes decoded (raw) audio or video data.
Definition: frame.h:374
tmp
static uint8_t tmp[11]
Definition: aes_ctr.c:28
pixdesc.h
AVCodecContext::color_trc
enum AVColorTransferCharacteristic color_trc
Color Transfer Characteristic.
Definition: avcodec.h:678
nvenc_set_timestamp
static int nvenc_set_timestamp(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *params, AVPacket *pkt)
Definition: nvenc.c:2350
AVCOL_RANGE_JPEG
@ AVCOL_RANGE_JPEG
Full range content.
Definition: pixfmt.h:686
P1
#define P1
Definition: cavsdsp.c:37
internal.h
AVPacket::data
uint8_t * data
Definition: packet.h:520
encode.h
AVCodecContext::b_quant_offset
float b_quant_offset
qscale offset between IP and B-frames
Definition: avcodec.h:811
NvencFrameData
Definition: nvenc.h:109
NVENC_LOWLATENCY
@ NVENC_LOWLATENCY
Definition: nvenc.h:164
reconfig_encoder
static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2643
NV_ENC_H264_PROFILE_MAIN
@ NV_ENC_H264_PROFILE_MAIN
Definition: nvenc.h:152
AV_LOG_VERBOSE
#define AV_LOG_VERBOSE
Detailed information.
Definition: log.h:196
AVCOL_SPC_RGB
@ AVCOL_SPC_RGB
order of coefficients is actually GBR, also IEC 61966-2-1 (sRGB), YZX and ST 428-1
Definition: pixfmt.h:610
ff_nvenc_pix_fmts
enum AVPixelFormat ff_nvenc_pix_fmts[]
Definition: nvenc.c:56
set_constqp
static av_cold void set_constqp(AVCodecContext *avctx)
Definition: nvenc.c:832
NvencSurface
Definition: nvenc.h:96
AVPacket::duration
int64_t duration
Duration of this packet in AVStream->time_base units, 0 if unknown.
Definition: packet.h:538
mathematics.h
FFMAX
#define FFMAX(a, b)
Definition: macros.h:47
av_buffer_ref
AVBufferRef * av_buffer_ref(const AVBufferRef *buf)
Create a new reference to an AVBuffer.
Definition: buffer.c:103
nvenc_print_error
static int nvenc_print_error(AVCodecContext *avctx, NVENCSTATUS err, const char *error_string)
Definition: nvenc.c:159
BD
#define BD
AVERROR_UNKNOWN
#define AVERROR_UNKNOWN
Unknown error, typically from an external library.
Definition: error.h:73
AVCodecContext::qmax
int qmax
maximum quantizer
Definition: avcodec.h:1263
nverr
NVENCSTATUS nverr
Definition: nvenc.c:112
set_lossless
static av_cold void set_lossless(AVCodecContext *avctx)
Definition: nvenc.c:937
PRESET
#define PRESET(name,...)
Definition: nvenc.c:187
AV_PKT_FLAG_KEY
#define AV_PKT_FLAG_KEY
The packet contains a keyframe.
Definition: packet.h:575
ff_nvenc_encode_flush
av_cold void ff_nvenc_encode_flush(AVCodecContext *avctx)
Definition: nvenc.c:2899
av_malloc
#define av_malloc(s)
Definition: tableprint_vlc.h:30
AV_CODEC_FLAG_GLOBAL_HEADER
#define AV_CODEC_FLAG_GLOBAL_HEADER
Place global headers in extradata instead of every keyframe.
Definition: avcodec.h:338
nvenc.h
AV_FRAME_FLAG_TOP_FIELD_FIRST
#define AV_FRAME_FLAG_TOP_FIELD_FIRST
A flag to mark frames where the top field is displayed first if the content is interlaced.
Definition: frame.h:638
av_memdup
void * av_memdup(const void *p, size_t size)
Duplicate a buffer with av_malloc().
Definition: mem.c:304
AV_HWDEVICE_TYPE_CUDA
@ AV_HWDEVICE_TYPE_CUDA
Definition: hwcontext.h:30
compute_dar
static void compute_dar(AVCodecContext *avctx, int *dw, int *dh)
Definition: nvenc.c:1581
AVCodecContext::framerate
AVRational framerate
Definition: avcodec.h:560
AVCOL_SPC_BT470BG
@ AVCOL_SPC_BT470BG
also ITU-R BT601-6 625 / ITU-R BT1358 625 / ITU-R BT1700 625 PAL & SECAM / IEC 61966-2-4 xvYCC601
Definition: pixfmt.h:615
nvenc_upload_frame
static int nvenc_upload_frame(AVCodecContext *avctx, const AVFrame *frame, NvencSurface *nvenc_frame)
Definition: nvenc.c:2228
NvencDynLoadFunctions::nvenc_device_count
int nvenc_device_count
Definition: nvenc.h:123
AV_CODEC_FLAG_COPY_OPAQUE
#define AV_CODEC_FLAG_COPY_OPAQUE
Definition: avcodec.h:299
AVCodecContext::i_quant_factor
float i_quant_factor
qscale factor between P- and I-frames If > 0 then the last P-frame quantizer will be used (q = lastp_...
Definition: avcodec.h:820
set_vbr
static av_cold void set_vbr(AVCodecContext *avctx)
Definition: nvenc.c:870
LIST_DEVICES
@ LIST_DEVICES
Definition: nvenc.h:173
nvenc_map_error
static int nvenc_map_error(NVENCSTATUS err, const char **desc)
Definition: nvenc.c:144
AVCodecContext::codec
const struct AVCodec * codec
Definition: avcodec.h:454
AVPacket::opaque_ref
AVBufferRef * opaque_ref
AVBufferRef for free use by the API user.
Definition: packet.h:556
nvenc_check_cap
static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
Definition: nvenc.c:446
presets
static const Preset presets[]
Definition: vf_pseudocolor.c:286
fail
#define fail()
Definition: checkasm.h:185
NV_ENC_H264_PROFILE_HIGH
@ NV_ENC_H264_PROFILE_HIGH
Definition: nvenc.h:153
av_fifo_write
int av_fifo_write(AVFifo *f, const void *buf, size_t nb_elems)
Write data into a FIFO.
Definition: fifo.c:188
dummy
int dummy
Definition: motion.c:66
NvencSurface::format
NV_ENC_BUFFER_FORMAT format
Definition: nvenc.h:106
nvenc_setup_rate_control
static av_cold int nvenc_setup_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:1029
sei.h
AVCodecContext::refs
int refs
number of reference frames
Definition: avcodec.h:715
AV_HWDEVICE_TYPE_D3D11VA
@ AV_HWDEVICE_TYPE_D3D11VA
Definition: hwcontext.h:35
nvenc_map_preset
static void nvenc_map_preset(NvencContext *ctx)
Definition: nvenc.c:189
NVENC_DEPRECATED_PRESET
@ NVENC_DEPRECATED_PRESET
Definition: nvenc.h:169
AVCodecContext::flags
int flags
AV_CODEC_FLAG_*.
Definition: avcodec.h:502
val
static double val(void *priv, double ch)
Definition: aeval.c:78
nvenc_copy_frame
static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface, NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
Definition: nvenc.c:2110
AVERROR_BUFFER_TOO_SMALL
#define AVERROR_BUFFER_TOO_SMALL
Buffer too small.
Definition: error.h:53
hwcontext_cuda.h
av_image_fill_pointers
int av_image_fill_pointers(uint8_t *data[4], enum AVPixelFormat pix_fmt, int height, uint8_t *ptr, const int linesizes[4])
Fill plane data pointers for an image with pixel format pix_fmt and height height.
Definition: imgutils.c:145
IS_GBRP
#define IS_GBRP(pix_fmt)
Definition: nvenc.c:108
AVCUDADeviceContext::cuda_ctx
CUcontext cuda_ctx
Definition: hwcontext_cuda.h:43
av_reduce
int av_reduce(int *dst_num, int *dst_den, int64_t num, int64_t den, int64_t max)
Reduce a fraction.
Definition: rational.c:35
nvenc_print_driver_requirement
static void nvenc_print_driver_requirement(AVCodecContext *avctx, int level)
Definition: nvenc.c:243
AVRational::num
int num
Numerator.
Definition: rational.h:59
AV_CODEC_FLAG_INTERLACED_DCT
#define AV_CODEC_FLAG_INTERLACED_DCT
Use interlaced DCT.
Definition: avcodec.h:330
nvenc_check_capabilities
static int nvenc_check_capabilities(AVCodecContext *avctx)
Definition: nvenc.c:463
AVHWDeviceContext
This struct aggregates all the (hardware/vendor-specific) "high-level" state, i.e.
Definition: hwcontext.h:60
av_frame_alloc
AVFrame * av_frame_alloc(void)
Allocate an AVFrame and set its fields to default values.
Definition: frame.c:148
NV_ENC_H264_PROFILE_HIGH_444P
@ NV_ENC_H264_PROFILE_HIGH_444P
Definition: nvenc.h:154
AVCodecContext::color_primaries
enum AVColorPrimaries color_primaries
Chromaticity coordinates of the source primaries.
Definition: avcodec.h:671
pkt
AVPacket * pkt
Definition: movenc.c:60
AV_LOG_ERROR
#define AV_LOG_ERROR
Something went wrong and cannot losslessly be recovered.
Definition: log.h:180
AVFrameSideData::size
size_t size
Definition: frame.h:253
FF_ARRAY_ELEMS
#define FF_ARRAY_ELEMS(a)
Definition: sinewin_tablegen.c:29
av_cold
#define av_cold
Definition: attributes.h:90
NV_ENC_HEVC_PROFILE_MAIN
@ NV_ENC_HEVC_PROFILE_MAIN
Definition: nvenc.h:158
av_fifo_read
int av_fifo_read(AVFifo *f, void *buf, size_t nb_elems)
Read data from a FIFO.
Definition: fifo.c:240
AV_PIX_FMT_YUVJ422P
@ AV_PIX_FMT_YUVJ422P
planar YUV 4:2:2, 16bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV422P and setting col...
Definition: pixfmt.h:86
AVCodecContext::extradata_size
int extradata_size
Definition: avcodec.h:524
AVCodecContext::has_b_frames
int has_b_frames
Size of the frame reordering buffer in the decoder.
Definition: avcodec.h:723
ff_nvenc_encode_init
av_cold int ff_nvenc_encode_init(AVCodecContext *avctx)
Definition: nvenc.c:2047
av_fast_realloc
void * av_fast_realloc(void *ptr, unsigned int *size, size_t min_size)
Reallocate the given buffer if it is not large enough, otherwise do nothing.
Definition: mem.c:497
width
#define width
AVCodecContext::global_quality
int global_quality
Global quality for codecs which cannot change it per frame.
Definition: avcodec.h:1239
AVD3D11VADeviceContext::device
ID3D11Device * device
Device used for texture creation and access.
Definition: hwcontext_d3d11va.h:56
AV_PIX_FMT_YUV444P16
#define AV_PIX_FMT_YUV444P16
Definition: pixfmt.h:491
AV1_METADATA_TYPE_TIMECODE
@ AV1_METADATA_TYPE_TIMECODE
Definition: av1.h:48
AVFormatContext::flags
int flags
Flags modifying the (de)muxer behaviour.
Definition: avformat.h:1406
AV_PIX_FMT_0BGR32
#define AV_PIX_FMT_0BGR32
Definition: pixfmt.h:456
pix_fmt
static enum AVPixelFormat pix_fmt
Definition: demux_decode.c:41
NvencDynLoadFunctions
Definition: nvenc.h:117
NVENC_RGB_MODE_DISABLED
@ NVENC_RGB_MODE_DISABLED
Definition: nvenc.h:178
ctx
AVFormatContext * ctx
Definition: movenc.c:49
SEI_TYPE_USER_DATA_REGISTERED_ITU_T_T35
@ SEI_TYPE_USER_DATA_REGISTERED_ITU_T_T35
Definition: sei.h:34
nvenc_setup_extradata
static av_cold int nvenc_setup_extradata(AVCodecContext *avctx)
Definition: nvenc.c:1928
timestamp_queue_enqueue
static void timestamp_queue_enqueue(AVFifo *queue, int64_t timestamp)
Definition: nvenc.c:2336
AV_PIX_FMT_YUV420P
@ AV_PIX_FMT_YUV420P
planar YUV 4:2:0, 12bpp, (1 Cr & Cb sample per 2x2 Y samples)
Definition: pixfmt.h:73
AVCodecContext::rc_max_rate
int64_t rc_max_rate
maximum bitrate
Definition: avcodec.h:1292
timestamp_queue_dequeue
static int64_t timestamp_queue_dequeue(AVFifo *queue)
Definition: nvenc.c:2341
AVPacket::opaque
void * opaque
for some private data of the user
Definition: packet.h:545
NvencDynLoadFunctions::nvenc_dl
NvencFunctions * nvenc_dl
Definition: nvenc.h:120
AVCPBProperties
This structure describes the bitrate properties of an encoded bitstream.
Definition: defs.h:270
AV_CODEC_ID_H264
@ AV_CODEC_ID_H264
Definition: codec_id.h:79
NvencSurface::pitch
int pitch
Definition: nvenc.h:103
AV_PIX_FMT_YUVJ444P
@ AV_PIX_FMT_YUVJ444P
planar YUV 4:4:4, 24bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV444P and setting col...
Definition: pixfmt.h:87
NvencSurface::input_surface
NV_ENC_INPUT_PTR input_surface
Definition: nvenc.h:98
AVCodecDescriptor::props
int props
Codec properties, a combination of AV_CODEC_PROP_* flags.
Definition: codec_desc.h:54
if
if(ret)
Definition: filter_design.txt:179
AVCodecContext::rc_buffer_size
int rc_buffer_size
decoder bitstream buffer size
Definition: avcodec.h:1277
NVENC_CAP
#define NVENC_CAP
Definition: nvenc.c:46
AV_PIX_FMT_GBRP16
#define AV_PIX_FMT_GBRP16
Definition: pixfmt.h:497
IS_10BIT
#define IS_10BIT(pix_fmt)
Definition: nvenc.c:88
fabs
static __device__ float fabs(float a)
Definition: cuda_runtime.h:182
ANY_DEVICE
@ ANY_DEVICE
Definition: nvenc.h:174
NULL
#define NULL
Definition: coverity.c:32
AVHWFramesContext::sw_format
enum AVPixelFormat sw_format
The pixel format identifying the actual data layout of the hardware frames.
Definition: hwcontext.h:210
NvencSurface::reg_idx
int reg_idx
Definition: nvenc.h:100
AVCodecContext::color_range
enum AVColorRange color_range
MPEG vs JPEG YUV range.
Definition: avcodec.h:695
av_buffer_unref
void av_buffer_unref(AVBufferRef **buf)
Free a given reference and automatically free the buffer if there are no more references to it.
Definition: buffer.c:139
SEI_TYPE_TIME_CODE
@ SEI_TYPE_TIME_CODE
Definition: sei.h:95
AV_CODEC_ID_AV1
@ AV_CODEC_ID_AV1
Definition: codec_id.h:280
AVCodecContext::internal
struct AVCodecInternal * internal
Private context used for internal data.
Definition: avcodec.h:480
AV_PIX_FMT_YUVJ420P
@ AV_PIX_FMT_YUVJ420P
planar YUV 4:2:0, 12bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV420P and setting col...
Definition: pixfmt.h:85
AVCodecContext::bit_rate
int64_t bit_rate
the average bitrate
Definition: avcodec.h:495
ff_nvenc_encode_close
av_cold int ff_nvenc_encode_close(AVCodecContext *avctx)
Definition: nvenc.c:1962
FrameData::duration
int64_t duration
Definition: librav1e.c:60
AV_PICTURE_TYPE_I
@ AV_PICTURE_TYPE_I
Intra.
Definition: avutil.h:279
NV_ENC_HEVC_PROFILE_REXT
@ NV_ENC_HEVC_PROFILE_REXT
Definition: nvenc.h:160
P3
#define P3
Definition: dsp_template.c:801
av_fifo_can_read
size_t av_fifo_can_read(const AVFifo *f)
Definition: fifo.c:87
flush
void(* flush)(AVBSFContext *ctx)
Definition: dts2pts.c:368
FrameData::frame_opaque
void * frame_opaque
Definition: librav1e.c:62
NvencDynLoadFunctions::cuda_dl
CudaFunctions * cuda_dl
Definition: nvenc.h:119
nvenc_setup_h264_config
static av_cold int nvenc_setup_h264_config(AVCodecContext *avctx)
Definition: nvenc.c:1207
AVPixFmtDescriptor::flags
uint64_t flags
Combination of AV_PIX_FMT_FLAG_...
Definition: pixdesc.h:94
AV_PROFILE_HEVC_MAIN_10
#define AV_PROFILE_HEVC_MAIN_10
Definition: defs.h:160
AV_PROFILE_HEVC_REXT
#define AV_PROFILE_HEVC_REXT
Definition: defs.h:162
AV_FRAME_DATA_SEI_UNREGISTERED
@ AV_FRAME_DATA_SEI_UNREGISTERED
User data unregistered metadata associated with a video frame.
Definition: frame.h:178
NVENC_LOSSLESS
@ NVENC_LOSSLESS
Definition: nvenc.h:165
AVCodecContext::time_base
AVRational time_base
This is the fundamental unit of time (in seconds) in terms of which frame timestamps are represented.
Definition: avcodec.h:544
av_fifo_reset2
void av_fifo_reset2(AVFifo *f)
Definition: fifo.c:280
AV_PIX_FMT_X2BGR10
#define AV_PIX_FMT_X2BGR10
Definition: pixfmt.h:537
AVCUDADeviceContext::stream
CUstream stream
Definition: hwcontext_cuda.h:44
desc
const char * desc
Definition: nvenc.c:114
nvenc_pop_context
static int nvenc_pop_context(AVCodecContext *avctx)
Definition: nvenc.c:372
HW_CONFIG_ENCODER_DEVICE
#define HW_CONFIG_ENCODER_DEVICE(format, device_type_)
Definition: hwconfig.h:95
AVFifo
Definition: fifo.c:35
AVCodecContext::gop_size
int gop_size
the number of pictures in a group of pictures, or 0 for intra_only
Definition: avcodec.h:1031
av_frame_ref
int av_frame_ref(AVFrame *dst, const AVFrame *src)
Set up a new reference to the data described by the source frame.
Definition: frame.c:384
nvenc_check_codec_support
static int nvenc_check_codec_support(AVCodecContext *avctx)
Definition: nvenc.c:410
AV_PIX_FMT_FLAG_RGB
#define AV_PIX_FMT_FLAG_RGB
The pixel format contains RGB-like data (as opposed to YUV/grayscale).
Definition: pixdesc.h:136
NVENC_TWO_PASSES
@ NVENC_TWO_PASSES
Definition: nvenc.h:167
AV_CODEC_PROP_REORDER
#define AV_CODEC_PROP_REORDER
Codec supports frame reordering.
Definition: codec_desc.h:92
ff_nvenc_hw_configs
const AVCodecHWConfigInternal *const ff_nvenc_hw_configs[]
Definition: nvenc.c:78
MAX_REGISTERED_FRAMES
#define MAX_REGISTERED_FRAMES
Definition: nvenc.h:41
AV1_METADATA_TYPE_ITUT_T35
@ AV1_METADATA_TYPE_ITUT_T35
Definition: av1.h:47
ff_alloc_timecode_sei
int ff_alloc_timecode_sei(const AVFrame *frame, AVRational rate, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for S12M timecode side data and allocate and fill TC SEI message with timecode info.
Definition: utils.c:998
P6
#define P6
Definition: filter_template.c:417
nvenc_alloc_surface
static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
Definition: nvenc.c:1827
AV_NOPTS_VALUE
#define AV_NOPTS_VALUE
Undefined timestamp value.
Definition: avutil.h:248
AVFrameSideData::data
uint8_t * data
Definition: frame.h:252
nvenc_check_device
static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
Definition: nvenc.c:641
nvenc_errors
static const struct @167 nvenc_errors[]
nvenc_register_frame
static int nvenc_register_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2174
AVCodecHWConfigInternal
Definition: hwconfig.h:25
frame_data
FrameData * frame_data(AVFrame *frame)
Get our axiliary frame data attached to the frame, allocating it if needed.
Definition: ffmpeg.c:452
ff_nvenc_receive_packet
int ff_nvenc_receive_packet(AVCodecContext *avctx, AVPacket *pkt)
Definition: nvenc.c:2848
AVPacket::dts
int64_t dts
Decompression timestamp in AVStream->time_base units; the time at which the packet is decompressed.
Definition: packet.h:519
height
#define height
AV_PIX_FMT_RGB32
#define AV_PIX_FMT_RGB32
Definition: pixfmt.h:451
nvenc_override_rate_control
static void nvenc_override_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:951
AVERROR_EXTERNAL
#define AVERROR_EXTERNAL
Generic error in an external library.
Definition: error.h:59
AVPacket::flags
int flags
A combination of AV_PKT_FLAG values.
Definition: packet.h:526
AV_PIX_FMT_D3D11
@ AV_PIX_FMT_D3D11
Hardware surfaces for Direct3D11.
Definition: pixfmt.h:336
FrameData::frame_opaque_ref
AVBufferRef * frame_opaque_ref
Definition: librav1e.c:63
AVCPBProperties::avg_bitrate
int64_t avg_bitrate
Average bitrate of the stream, in bits per second.
Definition: defs.h:285
get_free_frame
static NvencSurface * get_free_frame(NvencContext *ctx)
Definition: nvenc.c:2099
AV_LOG_INFO
#define AV_LOG_INFO
Standard information.
Definition: log.h:191
AVCodecContext::b_quant_factor
float b_quant_factor
qscale factor between IP and B-frames If > 0 then the last P-frame quantizer will be used (q= lastp_q...
Definition: avcodec.h:804
AVCodec::id
enum AVCodecID id
Definition: codec.h:201
nvenc_open_session
static av_cold int nvenc_open_session(AVCodecContext *avctx)
Definition: nvenc.c:384
HW_CONFIG_ENCODER_FRAMES
#define HW_CONFIG_ENCODER_FRAMES(format, device_type_)
Definition: hwconfig.h:98
i
#define i(width, name, range_min, range_max)
Definition: cbs_h2645.c:256
AVPacket::pts
int64_t pts
Presentation timestamp in AVStream->time_base units; the time at which the decompressed packet will b...
Definition: packet.h:513
FAST
@ FAST
Definition: vf_guided.c:33
AVCodecContext::extradata
uint8_t * extradata
some codecs need / can use extradata like Huffman tables.
Definition: avcodec.h:523
process_output_surface
static int process_output_surface(AVCodecContext *avctx, AVPacket *pkt, NvencSurface *tmpoutsurf)
Definition: nvenc.c:2420
nvenc_load_libraries
static av_cold int nvenc_load_libraries(AVCodecContext *avctx)
Definition: nvenc.c:317
nvenc_recalc_surfaces
static av_cold int nvenc_recalc_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:986
AVD3D11VADeviceContext
This struct is allocated as AVHWDeviceContext.hwctx.
Definition: hwcontext_d3d11va.h:45
IS_RGB
#define IS_RGB(pix_fmt)
Definition: nvenc.c:95
AVCPBProperties::max_bitrate
int64_t max_bitrate
Maximum bitrate of the stream, in bits per second.
Definition: defs.h:275
AV_CODEC_ID_HEVC
@ AV_CODEC_ID_HEVC
Definition: codec_id.h:226
xf
#define xf(width, name, var, range_min, range_max, subs,...)
Definition: cbs_av1.c:590
prepare_sei_data_array
static int prepare_sei_data_array(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2531
FFMIN
#define FFMIN(a, b)
Definition: macros.h:49
av_frame_unref
void av_frame_unref(AVFrame *frame)
Unreference all the buffers referenced by frame and reset the frame fields.
Definition: frame.c:606
AV_PIX_FMT_X2RGB10
#define AV_PIX_FMT_X2RGB10
Definition: pixfmt.h:536
av_mallocz
void * av_mallocz(size_t size)
Allocate a memory block with alignment suitable for all memory accesses (including vectors if availab...
Definition: mem.c:256
AVCodecContext::hw_device_ctx
AVBufferRef * hw_device_ctx
A reference to the AVHWDeviceContext describing the device which will be used by a hardware encoder/d...
Definition: avcodec.h:1497
IS_YUV444
#define IS_YUV444(pix_fmt)
Definition: nvenc.c:102
P2
#define P2
Definition: cavsdsp.c:36
IS_CBR
#define IS_CBR(rc)
Definition: nvenc.c:49
av_rescale
int64_t av_rescale(int64_t a, int64_t b, int64_t c)
Rescale a 64-bit integer with rounding to nearest.
Definition: mathematics.c:129
AVCodecContext::height
int height
Definition: avcodec.h:618
AVCodecContext::pix_fmt
enum AVPixelFormat pix_fmt
Pixel format, see AV_PIX_FMT_xxx.
Definition: avcodec.h:657
CHECK_CU
#define CHECK_CU(x)
Definition: nvenc.c:44
nvenc_map_buffer_format
static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
Definition: nvenc.c:1796
av_calloc
void * av_calloc(size_t nmemb, size_t size)
Definition: mem.c:264
AV_PIX_FMT_P016
#define AV_PIX_FMT_P016
Definition: pixfmt.h:530
AVCodecContext::hw_frames_ctx
AVBufferRef * hw_frames_ctx
A reference to the AVHWFramesContext describing the input (for encoding) or output (decoding) frames.
Definition: avcodec.h:1475
NvencSurface::width
int width
Definition: nvenc.h:101
AVHWFramesContext
This struct describes a set or pool of "hardware" frames (i.e.
Definition: hwcontext.h:115
AVCUDADeviceContext
This struct is allocated as AVHWDeviceContext.hwctx.
Definition: hwcontext_cuda.h:42
AV_PROFILE_H264_HIGH_444_PREDICTIVE
#define AV_PROFILE_H264_HIGH_444_PREDICTIVE
Definition: defs.h:122
ret
ret
Definition: filter_design.txt:187
AV_LOG_FATAL
#define AV_LOG_FATAL
Something went wrong and recovery is not possible.
Definition: log.h:174
AVHWDeviceContext::type
enum AVHWDeviceType type
This field identifies the underlying API used for hardware access.
Definition: hwcontext.h:72
nvenc_setup_encoder
static av_cold int nvenc_setup_encoder(AVCodecContext *avctx)
Definition: nvenc.c:1614
AV_PIX_FMT_NV12
@ AV_PIX_FMT_NV12
planar YUV 4:2:0, 12bpp, 1 plane for Y and 1 plane for the UV components, which are interleaved (firs...
Definition: pixfmt.h:96
FFSWAP
#define FFSWAP(type, a, b)
Definition: macros.h:52
frame
these buffered frames must be flushed immediately if a new input produces new the filter must not call request_frame to get more It must just process the frame or queue it The task of requesting more frames is left to the filter s request_frame method or the application If a filter has several the filter must be ready for frames arriving randomly on any input any filter with several inputs will most likely require some kind of queuing mechanism It is perfectly acceptable to have a limited queue and to drop frames when the inputs are too unbalanced request_frame For filters that do not use the this method is called when a frame is wanted on an output For a it should directly call filter_frame on the corresponding output For a if there are queued frames already one of these frames should be pushed If the filter should request a frame on one of its repeatedly until at least one frame has been pushed Return or at least make progress towards producing a frame
Definition: filter_design.txt:264
averr
int averr
Definition: nvenc.c:113
AV_PIX_FMT_0RGB32
#define AV_PIX_FMT_0RGB32
Definition: pixfmt.h:455
AVHWFramesContext::device_ctx
AVHWDeviceContext * device_ctx
The parent AVHWDeviceContext.
Definition: hwcontext.h:134
AVCPBProperties::buffer_size
int64_t buffer_size
The size of the buffer to which the ratecontrol is applied, in bits.
Definition: defs.h:291
cuda_check.h
atsc_a53.h
AV_PROFILE_H264_BASELINE
#define AV_PROFILE_H264_BASELINE
Definition: defs.h:110
av_fifo_alloc2
AVFifo * av_fifo_alloc2(size_t nb_elems, size_t elem_size, unsigned int flags)
Allocate and initialize an AVFifo with a given element size.
Definition: fifo.c:47
AV_INPUT_BUFFER_PADDING_SIZE
#define AV_INPUT_BUFFER_PADDING_SIZE
Definition: defs.h:40
nvenc_codec_specific_pic_params
static void nvenc_codec_specific_pic_params(AVCodecContext *avctx, NV_ENC_PIC_PARAMS *params, NV_ENC_SEI_PAYLOAD *sei_data, int sei_count)
Definition: nvenc.c:2290
AVCodecContext
main external API structure.
Definition: avcodec.h:445
AV_PROFILE_H264_HIGH
#define AV_PROFILE_H264_HIGH
Definition: defs.h:114
AV_PICTURE_TYPE_B
@ AV_PICTURE_TYPE_B
Bi-dir predicted.
Definition: avutil.h:281
ff_get_encode_buffer
int ff_get_encode_buffer(AVCodecContext *avctx, AVPacket *avpkt, int64_t size, int flags)
Get a buffer for a packet.
Definition: encode.c:106
NvencSurface::height
int height
Definition: nvenc.h:102
SEI_TYPE_USER_DATA_UNREGISTERED
@ SEI_TYPE_USER_DATA_UNREGISTERED
Definition: sei.h:35
av_image_copy2
static void av_image_copy2(uint8_t *const dst_data[4], const int dst_linesizes[4], uint8_t *const src_data[4], const int src_linesizes[4], enum AVPixelFormat pix_fmt, int width, int height)
Wrapper around av_image_copy() to workaround the limitation that the conversion from uint8_t * const ...
Definition: imgutils.h:184
AVCodecContext::qmin
int qmin
minimum quantizer
Definition: avcodec.h:1256
AVRational::den
int den
Denominator.
Definition: rational.h:60
AV_PIX_FMT_NONE
@ AV_PIX_FMT_NONE
Definition: pixfmt.h:72
AVCodecContext::profile
int profile
profile
Definition: avcodec.h:1640
nvenc_setup_surfaces
static av_cold int nvenc_setup_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:1883
AVCodecContext::i_quant_offset
float i_quant_offset
qscale offset between P and I-frames
Definition: avcodec.h:827
AVFrameSideData::type
enum AVFrameSideDataType type
Definition: frame.h:251
NvencSurface::output_surface
NV_ENC_OUTPUT_PTR output_surface
Definition: nvenc.h:105
AVCodecContext::ticks_per_frame
attribute_deprecated int ticks_per_frame
For some codecs, the time base is closer to the field rate than the frame rate.
Definition: avcodec.h:576
nvenc_find_free_reg_resource
static int nvenc_find_free_reg_resource(AVCodecContext *avctx)
Definition: nvenc.c:2140
AV_PIX_FMT_YUV444P
@ AV_PIX_FMT_YUV444P
planar YUV 4:4:4, 24bpp, (1 Cr & Cb sample per 1x1 Y samples)
Definition: pixfmt.h:78
P7
#define P7
Definition: filter_template.c:416
AV_PIX_FMT_P010
#define AV_PIX_FMT_P010
Definition: pixfmt.h:528
AVCodecInternal::draining
int draining
checks API usage: after codec draining, flush is required to resume operation
Definition: internal.h:128
FF_DISABLE_DEPRECATION_WARNINGS
#define FF_DISABLE_DEPRECATION_WARNINGS
Definition: internal.h:72
AV_PIX_FMT_GBRP
@ AV_PIX_FMT_GBRP
planar GBR 4:4:4 24bpp
Definition: pixfmt.h:165
NvencDynLoadFunctions::nvenc_funcs
NV_ENCODE_API_FUNCTION_LIST nvenc_funcs
Definition: nvenc.h:122
AV_PICTURE_TYPE_P
@ AV_PICTURE_TYPE_P
Predicted.
Definition: avutil.h:280
mem.h
AVCodecContext::max_b_frames
int max_b_frames
maximum number of B-frames between non-B-frames Note: The output will be delayed by max_b_frames+1 re...
Definition: avcodec.h:795
ff_encode_get_frame
int ff_encode_get_frame(AVCodecContext *avctx, AVFrame *frame)
Called by encoders to get the next frame for encoding.
Definition: encode.c:205
packet_internal.h
AVFrameSideData
Structure to hold side data for an AVFrame.
Definition: frame.h:250
AVPixFmtDescriptor
Descriptor that unambiguously describes how the bits of a pixel are stored in the up to 4 data planes...
Definition: pixdesc.h:69
NV_ENC_HEVC_PROFILE_MAIN_10
@ NV_ENC_HEVC_PROFILE_MAIN_10
Definition: nvenc.h:159
P4
#define P4
Definition: filter_template.c:419
av_free
#define av_free(p)
Definition: tableprint_vlc.h:33
AVCodecContext::slices
int slices
Number of slices.
Definition: avcodec.h:1047
DEFAULT
#define DEFAULT
Definition: avdct.c:29
AVPacket
This structure stores compressed data.
Definition: packet.h:497
AVCodecContext::priv_data
void * priv_data
Definition: avcodec.h:472
av_freep
#define av_freep(p)
Definition: tableprint_vlc.h:34
AV_PICTURE_TYPE_BI
@ AV_PICTURE_TYPE_BI
BI type.
Definition: avutil.h:285
nvenc_setup_device
static av_cold int nvenc_setup_device(AVCodecContext *avctx)
Definition: nvenc.c:716
P5
#define P5
Definition: filter_template.c:418
AVCodecContext::width
int width
picture width / height.
Definition: avcodec.h:618
imgutils.h
flags
#define flags(name, subs,...)
Definition: cbs_av1.c:474
hwcontext.h
AVERROR_BUG
#define AVERROR_BUG
Internal bug, also see AVERROR_BUG2.
Definition: error.h:52
av_log
#define av_log(a,...)
Definition: tableprint_vlc.h:27
av_fifo_freep2
void av_fifo_freep2(AVFifo **f)
Free an AVFifo and reset pointer to NULL.
Definition: fifo.c:286
ff_side_data_set_encoder_stats
int ff_side_data_set_encoder_stats(AVPacket *pkt, int quality, int64_t *error, int error_count, int pict_type)
Definition: packet.c:607
AVERROR_EXIT
#define AVERROR_EXIT
Immediate exit was requested; the called function should not be restarted.
Definition: error.h:58
ff_encode_add_cpb_side_data
AVCPBProperties * ff_encode_add_cpb_side_data(AVCodecContext *avctx)
Add a CPB properties side data to an encoding context.
Definition: encode.c:880
nvenc_setup_codec_config
static av_cold int nvenc_setup_codec_config(AVCodecContext *avctx)
Definition: nvenc.c:1564
FF_QP2LAMBDA
#define FF_QP2LAMBDA
factor to convert from H.263 QP to lambda
Definition: avutil.h:227
AV_PROFILE_AV1_MAIN
#define AV_PROFILE_AV1_MAIN
Definition: defs.h:168
codec_desc.h
int
int
Definition: ffmpeg_filter.c:424
AVCodecContext::sample_aspect_ratio
AVRational sample_aspect_ratio
sample aspect ratio (0 if unknown) That is the width of a pixel divided by the height of the pixel.
Definition: avcodec.h:642
nvenc_setup_hevc_config
static av_cold int nvenc_setup_hevc_config(AVCodecContext *avctx)
Definition: nvenc.c:1338
RC_MODE_DEPRECATED
#define RC_MODE_DEPRECATED
Definition: nvenc.h:42
nvenc_send_frame
static int nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2735
av_get_pix_fmt_name
const char * av_get_pix_fmt_name(enum AVPixelFormat pix_fmt)
Return the short name for a pixel format, NULL in case pix_fmt is unknown.
Definition: pixdesc.c:2885
nvenc_retrieve_frame_data
static int nvenc_retrieve_frame_data(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *lock_params, AVPacket *pkt)
Definition: nvenc.c:2399