31static void store_slice_sse2(uint8_t *
dst,
const int16_t *
src,
32 int dst_stride,
int src_stride,
34 const uint8_t
dither[8][8])
38 for (y = 0; y <
height; y++) {
42 "movq (%3), %%xmm1 \n"
44 "pxor %%xmm0, %%xmm0 \n"
45 "punpcklbw %%xmm0, %%xmm1 \n"
46 "psraw %%xmm2, %%xmm1 \n"
49 "movdqa (%0), %%xmm0 \n"
50 "paddw %%xmm1, %%xmm0 \n"
51 "psraw %%xmm2, %%xmm0 \n"
52 "packuswb %%xmm0, %%xmm0 \n"
53 "movq %%xmm0, (%1) \n"
58 :
"+r" (
src1),
"+r"(dst1)
75 s->store_slice = store_slice_sse2;
uint8_t ptrdiff_t const uint8_t ptrdiff_t int intptr_t intptr_t int int16_t * dst
#define XMM_CLOBBERS_ONLY(...)
__asm__(".macro parse_r var r\n\t" "\\var = -1\n\t" _IFC_REG(0) _IFC_REG(1) _IFC_REG(2) _IFC_REG(3) _IFC_REG(4) _IFC_REG(5) _IFC_REG(6) _IFC_REG(7) _IFC_REG(8) _IFC_REG(9) _IFC_REG(10) _IFC_REG(11) _IFC_REG(12) _IFC_REG(13) _IFC_REG(14) _IFC_REG(15) _IFC_REG(16) _IFC_REG(17) _IFC_REG(18) _IFC_REG(19) _IFC_REG(20) _IFC_REG(21) _IFC_REG(22) _IFC_REG(23) _IFC_REG(24) _IFC_REG(25) _IFC_REG(26) _IFC_REG(27) _IFC_REG(28) _IFC_REG(29) _IFC_REG(30) _IFC_REG(31) ".iflt \\var\n\t" ".error \"Unable to parse register name \\r\"\n\t" ".endif\n\t" ".endm")
Macro definitions for various function/variable attributes.
static atomic_int cpu_flags
int av_get_cpu_flags(void)
Return the flags which specify extensions supported by the CPU.
#define INLINE_SSE2(flags)
static const uint16_t dither[8][8]
void ff_spp_init_x86(SPPContext *s)