FFmpeg
cpu.c
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1 /*
2  * This file is part of FFmpeg.
3  *
4  * FFmpeg is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU Lesser General Public
6  * License as published by the Free Software Foundation; either
7  * version 2.1 of the License, or (at your option) any later version.
8  *
9  * FFmpeg is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12  * Lesser General Public License for more details.
13  *
14  * You should have received a copy of the GNU Lesser General Public
15  * License along with FFmpeg; if not, write to the Free Software
16  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
17  */
18 
19 #include "config.h"
20 
21 #if HAVE_SCHED_GETAFFINITY
22 #ifndef _GNU_SOURCE
23 # define _GNU_SOURCE
24 #endif
25 #include <sched.h>
26 #endif
27 
28 #include <stddef.h>
29 #include <stdint.h>
30 #include <stdatomic.h>
31 
32 #include "attributes.h"
33 #include "cpu.h"
34 #include "cpu_internal.h"
35 #include "opt.h"
36 #include "common.h"
37 
38 #if HAVE_GETPROCESSAFFINITYMASK || HAVE_WINRT
39 #include <windows.h>
40 #endif
41 #if HAVE_SYSCTL
42 #if HAVE_SYS_PARAM_H
43 #include <sys/param.h>
44 #endif
45 #include <sys/types.h>
46 #include <sys/sysctl.h>
47 #endif
48 #if HAVE_UNISTD_H
49 #include <unistd.h>
50 #endif
51 
52 #if HAVE_GETAUXVAL || HAVE_ELF_AUX_INFO
53 #include <sys/auxv.h>
54 #endif
55 
56 static atomic_int cpu_flags = -1;
57 static atomic_int cpu_count = -1;
58 
59 static int get_cpu_flags(void)
60 {
61 #if ARCH_MIPS
62  return ff_get_cpu_flags_mips();
63 #elif ARCH_AARCH64
64  return ff_get_cpu_flags_aarch64();
65 #elif ARCH_ARM
66  return ff_get_cpu_flags_arm();
67 #elif ARCH_PPC
68  return ff_get_cpu_flags_ppc();
69 #elif ARCH_RISCV
70  return ff_get_cpu_flags_riscv();
71 #elif ARCH_X86
72  return ff_get_cpu_flags_x86();
73 #elif ARCH_LOONGARCH
74  return ff_get_cpu_flags_loongarch();
75 #endif
76  return 0;
77 }
78 
79 void av_force_cpu_flags(int arg){
80  if (ARCH_X86 &&
81  (arg & ( AV_CPU_FLAG_3DNOW |
82  AV_CPU_FLAG_3DNOWEXT |
83  AV_CPU_FLAG_MMXEXT |
84  AV_CPU_FLAG_SSE |
85  AV_CPU_FLAG_SSE2 |
86  AV_CPU_FLAG_SSE2SLOW |
87  AV_CPU_FLAG_SSE3 |
88  AV_CPU_FLAG_SSE3SLOW |
89  AV_CPU_FLAG_SSSE3 |
90  AV_CPU_FLAG_SSE4 |
91  AV_CPU_FLAG_SSE42 |
92  AV_CPU_FLAG_AVX |
93  AV_CPU_FLAG_AVXSLOW |
94  AV_CPU_FLAG_XOP |
95  AV_CPU_FLAG_FMA3 |
96  AV_CPU_FLAG_FMA4 |
97  AV_CPU_FLAG_AVX2 |
98  AV_CPU_FLAG_AVX512 ))
99  && !(arg & AV_CPU_FLAG_MMX)) {
100  av_log(NULL, AV_LOG_WARNING, "MMX implied by specified flags\n");
101  arg |= AV_CPU_FLAG_MMX;
102  }
103 
104  atomic_store_explicit(&cpu_flags, arg, memory_order_relaxed);
105 }
106 
107 int av_get_cpu_flags(void)
108 {
109  int flags = atomic_load_explicit(&cpu_flags, memory_order_relaxed);
110  if (flags == -1) {
111  flags = get_cpu_flags();
112  atomic_store_explicit(&cpu_flags, flags, memory_order_relaxed);
113  }
114  return flags;
115 }
116 
117 int av_parse_cpu_caps(unsigned *flags, const char *s)
118 {
119  static const AVOption cpuflags_opts[] = {
120  { "flags" , NULL, 0, AV_OPT_TYPE_FLAGS, { .i64 = 0 }, INT64_MIN, INT64_MAX, .unit = "flags" },
121 #if ARCH_PPC
122  { "altivec" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ALTIVEC }, .unit = "flags" },
123 #elif ARCH_X86
124  { "mmx" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMX }, .unit = "flags" },
125  { "mmx2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMX2 }, .unit = "flags" },
126  { "mmxext" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMX2 }, .unit = "flags" },
127  { "sse" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE }, .unit = "flags" },
128  { "sse2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE2 }, .unit = "flags" },
129  { "sse2slow", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE2SLOW }, .unit = "flags" },
130  { "sse3" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE3 }, .unit = "flags" },
131  { "sse3slow", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE3SLOW }, .unit = "flags" },
132  { "ssse3" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSSE3 }, .unit = "flags" },
133  { "atom" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ATOM }, .unit = "flags" },
134  { "sse4.1" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE4 }, .unit = "flags" },
135  { "sse4.2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE42 }, .unit = "flags" },
136  { "avx" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVX }, .unit = "flags" },
137  { "avxslow" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVXSLOW }, .unit = "flags" },
138  { "xop" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_XOP }, .unit = "flags" },
139  { "fma3" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_FMA3 }, .unit = "flags" },
140  { "fma4" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_FMA4 }, .unit = "flags" },
141  { "avx2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVX2 }, .unit = "flags" },
142  { "bmi1" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_BMI1 }, .unit = "flags" },
143  { "bmi2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_BMI2 }, .unit = "flags" },
144  { "3dnow" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_3DNOW }, .unit = "flags" },
145  { "3dnowext", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_3DNOWEXT }, .unit = "flags" },
146  { "cmov", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_CMOV }, .unit = "flags" },
147  { "aesni", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AESNI }, .unit = "flags" },
148  { "avx512" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVX512 }, .unit = "flags" },
149  { "avx512icl", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVX512ICL }, .unit = "flags" },
150  { "slowgather", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SLOW_GATHER }, .unit = "flags" },
151 
152 #define CPU_FLAG_P2 AV_CPU_FLAG_CMOV | AV_CPU_FLAG_MMX
153 #define CPU_FLAG_P3 CPU_FLAG_P2 | AV_CPU_FLAG_MMX2 | AV_CPU_FLAG_SSE
154 #define CPU_FLAG_P4 CPU_FLAG_P3| AV_CPU_FLAG_SSE2
155  { "pentium2", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_P2 }, .unit = "flags" },
156  { "pentium3", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_P3 }, .unit = "flags" },
157  { "pentium4", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_P4 }, .unit = "flags" },
158 
159 #define CPU_FLAG_K62 AV_CPU_FLAG_MMX | AV_CPU_FLAG_3DNOW
160 #define CPU_FLAG_ATHLON CPU_FLAG_K62 | AV_CPU_FLAG_CMOV | AV_CPU_FLAG_3DNOWEXT | AV_CPU_FLAG_MMX2
161 #define CPU_FLAG_ATHLONXP CPU_FLAG_ATHLON | AV_CPU_FLAG_SSE
162 #define CPU_FLAG_K8 CPU_FLAG_ATHLONXP | AV_CPU_FLAG_SSE2
163  { "k6", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMX }, .unit = "flags" },
164  { "k62", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_K62 }, .unit = "flags" },
165  { "athlon", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_ATHLON }, .unit = "flags" },
166  { "athlonxp", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_ATHLONXP }, .unit = "flags" },
167  { "k8", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_K8 }, .unit = "flags" },
168 #elif ARCH_ARM
169  { "armv5te", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV5TE }, .unit = "flags" },
170  { "armv6", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV6 }, .unit = "flags" },
171  { "armv6t2", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV6T2 }, .unit = "flags" },
172  { "vfp", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFP }, .unit = "flags" },
173  { "vfp_vm", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFP_VM }, .unit = "flags" },
174  { "vfpv3", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFPV3 }, .unit = "flags" },
175  { "neon", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_NEON }, .unit = "flags" },
176  { "setend", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SETEND }, .unit = "flags" },
177 #elif ARCH_AARCH64
178  { "armv8", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV8 }, .unit = "flags" },
179  { "neon", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_NEON }, .unit = "flags" },
180  { "vfp", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFP }, .unit = "flags" },
181  { "dotprod", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_DOTPROD }, .unit = "flags" },
182  { "i8mm", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_I8MM }, .unit = "flags" },
183 #elif ARCH_MIPS
184  { "mmi", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMI }, .unit = "flags" },
185  { "msa", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MSA }, .unit = "flags" },
186 #elif ARCH_LOONGARCH
187  { "lsx", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_LSX }, .unit = "flags" },
188  { "lasx", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_LASX }, .unit = "flags" },
189 #elif ARCH_RISCV
190  { "rvi", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RVI }, .unit = "flags" },
191  { "rvb", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RVB }, .unit = "flags" },
192  { "zve32x", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RVV_I32 }, .unit = "flags" },
193  { "zve32f", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RVV_F32 }, .unit = "flags" },
194  { "zve64x", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RVV_I64 }, .unit = "flags" },
195  { "zve64d", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RVV_F64 }, .unit = "flags" },
196  { "zbb", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RVB_BASIC }, .unit = "flags" },
197  { "zvbb", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RV_ZVBB }, .unit = "flags" },
198  { "misaligned", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RV_MISALIGNED }, .unit = "flags" },
199 #endif
200  { NULL },
201  };
202  static const AVClass class = {
203  .class_name = "cpuflags",
204  .item_name = av_default_item_name,
205  .option = cpuflags_opts,
206  .version = LIBAVUTIL_VERSION_INT,
207  };
208  const AVClass *pclass = &class;
209 
210  return av_opt_eval_flags(&pclass, &cpuflags_opts[0], s, flags);
211 }
212 
213 int av_cpu_count(void)
214 {
215  static atomic_int printed = 0;
216 
217  int nb_cpus = 1;
218  int count = 0;
219 #if HAVE_WINRT
220  SYSTEM_INFO sysinfo;
221 #endif
222 #if HAVE_SCHED_GETAFFINITY && defined(CPU_COUNT)
223  cpu_set_t cpuset;
224 
225  CPU_ZERO(&cpuset);
226 
227  if (!sched_getaffinity(0, sizeof(cpuset), &cpuset))
228  nb_cpus = CPU_COUNT(&cpuset);
229 #elif HAVE_GETPROCESSAFFINITYMASK
230  DWORD_PTR proc_aff, sys_aff;
231  if (GetProcessAffinityMask(GetCurrentProcess(), &proc_aff, &sys_aff))
232  nb_cpus = av_popcount64(proc_aff);
233 #elif HAVE_SYSCTL && defined(HW_NCPUONLINE)
234  int mib[2] = { CTL_HW, HW_NCPUONLINE };
235  size_t len = sizeof(nb_cpus);
236 
237  if (sysctl(mib, 2, &nb_cpus, &len, NULL, 0) == -1)
238  nb_cpus = 0;
239 #elif HAVE_SYSCTL && defined(HW_NCPU)
240  int mib[2] = { CTL_HW, HW_NCPU };
241  size_t len = sizeof(nb_cpus);
242 
243  if (sysctl(mib, 2, &nb_cpus, &len, NULL, 0) == -1)
244  nb_cpus = 0;
245 #elif HAVE_SYSCONF && defined(_SC_NPROC_ONLN)
246  nb_cpus = sysconf(_SC_NPROC_ONLN);
247 #elif HAVE_SYSCONF && defined(_SC_NPROCESSORS_ONLN)
248  nb_cpus = sysconf(_SC_NPROCESSORS_ONLN);
249 #elif HAVE_WINRT
250  GetNativeSystemInfo(&sysinfo);
251  nb_cpus = sysinfo.dwNumberOfProcessors;
252 #endif
253 
254  if (!atomic_exchange_explicit(&printed, 1, memory_order_relaxed))
255  av_log(NULL, AV_LOG_DEBUG, "detected %d logical cores\n", nb_cpus);
256 
257  count = atomic_load_explicit(&cpu_count, memory_order_relaxed);
258 
259  if (count > 0) {
260  nb_cpus = count;
261  av_log(NULL, AV_LOG_DEBUG, "overriding to %d logical cores\n", nb_cpus);
262  }
263 
264  return nb_cpus;
265 }
266 
267 void av_cpu_force_count(int count)
268 {
269  atomic_store_explicit(&cpu_count, count, memory_order_relaxed);
270 }
271 
272 size_t av_cpu_max_align(void)
273 {
274 #if ARCH_MIPS
275  return ff_get_cpu_max_align_mips();
276 #elif ARCH_AARCH64
277  return ff_get_cpu_max_align_aarch64();
278 #elif ARCH_ARM
279  return ff_get_cpu_max_align_arm();
280 #elif ARCH_PPC
281  return ff_get_cpu_max_align_ppc();
282 #elif ARCH_X86
283  return ff_get_cpu_max_align_x86();
284 #elif ARCH_LOONGARCH
285  return ff_get_cpu_max_align_loongarch();
286 #endif
287 
288  return 8;
289 }
290 
291 unsigned long ff_getauxval(unsigned long type)
292 {
293 #if HAVE_GETAUXVAL
294  return getauxval(type);
295 #elif HAVE_ELF_AUX_INFO
296  unsigned long aux = 0;
297  int ret = elf_aux_info(type, &aux, sizeof(aux));
298  if (ret != 0) {
299  errno = ret;
300  }
301  return aux;
302 #else
303  errno = ENOSYS;
304  return 0;
305 #endif
306 }
AV_CPU_FLAG_VFP
#define AV_CPU_FLAG_VFP
Definition: cpu.h:68
av_force_cpu_flags
void av_force_cpu_flags(int arg)
Disables cpu detection and forces the specified flags.
Definition: cpu.c:79
AV_LOG_WARNING
#define AV_LOG_WARNING
Something somehow does not look correct.
Definition: log.h:186
AV_CPU_FLAG_SSE3
#define AV_CPU_FLAG_SSE3
Prescott SSE3 functions.
Definition: cpu.h:39
opt.h
cpu_count
static atomic_int cpu_count
Definition: cpu.c:57
AV_CPU_FLAG_RVB_BASIC
#define AV_CPU_FLAG_RVB_BASIC
Basic bit-manipulations.
Definition: cpu.h:94
av_cpu_force_count
void av_cpu_force_count(int count)
Overrides cpu count detection and forces the specified count.
Definition: cpu.c:267
AV_CPU_FLAG_LSX
#define AV_CPU_FLAG_LSX
Definition: cpu.h:81
av_popcount64
#define av_popcount64
Definition: common.h:157
AV_CPU_FLAG_SSE3SLOW
#define AV_CPU_FLAG_SSE3SLOW
SSE3 supported, but usually not faster.
Definition: cpu.h:40
AV_CPU_FLAG_RV_ZVBB
#define AV_CPU_FLAG_RV_ZVBB
Vector basic bit-manipulations.
Definition: cpu.h:98
ff_get_cpu_flags_arm
int ff_get_cpu_flags_arm(void)
Definition: cpu.c:167
AV_CPU_FLAG_3DNOW
#define AV_CPU_FLAG_3DNOW
AMD 3DNOW.
Definition: cpu.h:33
ff_get_cpu_max_align_loongarch
size_t ff_get_cpu_max_align_loongarch(void)
Definition: cpu.c:51
AVOption
AVOption.
Definition: opt.h:429
atomic_int
intptr_t atomic_int
Definition: stdatomic.h:55
ff_get_cpu_flags_loongarch
int ff_get_cpu_flags_loongarch(void)
Definition: cpu.c:41
AV_CPU_FLAG_DOTPROD
#define AV_CPU_FLAG_DOTPROD
Definition: cpu.h:73
av_get_cpu_flags
int av_get_cpu_flags(void)
Return the flags which specify extensions supported by the CPU.
Definition: cpu.c:107
AV_CPU_FLAG_BMI1
#define AV_CPU_FLAG_BMI1
Bit Manipulation Instruction Set 1.
Definition: cpu.h:55
cpu_flags
static atomic_int cpu_flags
Definition: cpu.c:56
AV_CPU_FLAG_RVV_F64
#define AV_CPU_FLAG_RVV_F64
Vectors of double's.
Definition: cpu.h:93
AV_CPU_FLAG_RVB
#define AV_CPU_FLAG_RVB
B (bit manipulations)
Definition: cpu.h:100
AV_CPU_FLAG_SSSE3
#define AV_CPU_FLAG_SSSE3
Conroe SSSE3 functions.
Definition: cpu.h:42
AV_CPU_FLAG_XOP
#define AV_CPU_FLAG_XOP
Bulldozer XOP functions.
Definition: cpu.h:50
av_parse_cpu_caps
int av_parse_cpu_caps(unsigned *flags, const char *s)
Parse CPU caps from a string and update the given AV_CPU_* flags based on that.
Definition: cpu.c:117
AV_CPU_FLAG_3DNOWEXT
#define AV_CPU_FLAG_3DNOWEXT
AMD 3DNowExt.
Definition: cpu.h:38
type
it s the only field you need to keep assuming you have a context There is some magic you don t need to care about around this just let it vf type
Definition: writing_filters.txt:86
AV_CPU_FLAG_RVV_F32
#define AV_CPU_FLAG_RVV_F32
Vectors of float's *‍/.
Definition: cpu.h:91
AV_CPU_FLAG_SLOW_GATHER
#define AV_CPU_FLAG_SLOW_GATHER
CPU has slow gathers.
Definition: cpu.h:59
AV_CPU_FLAG_AVX512
#define AV_CPU_FLAG_AVX512
AVX-512 functions: requires OS support even if YMM/ZMM registers aren't used.
Definition: cpu.h:57
ff_get_cpu_max_align_x86
size_t ff_get_cpu_max_align_x86(void)
Definition: cpu.c:257
cpu_internal.h
s
#define s(width, name)
Definition: cbs_vp9.c:198
AV_CPU_FLAG_ARMV6
#define AV_CPU_FLAG_ARMV6
Definition: cpu.h:66
AV_LOG_DEBUG
#define AV_LOG_DEBUG
Stuff which is only useful for libav* developers.
Definition: log.h:201
ff_get_cpu_max_align_mips
size_t ff_get_cpu_max_align_mips(void)
Definition: cpu.c:119
ff_get_cpu_max_align_aarch64
size_t ff_get_cpu_max_align_aarch64(void)
Definition: cpu.c:144
AV_CPU_FLAG_SSE4
#define AV_CPU_FLAG_SSE4
Penryn SSE4.1 functions.
Definition: cpu.h:45
arg
const char * arg
Definition: jacosubdec.c:67
LIBAVUTIL_VERSION_INT
#define LIBAVUTIL_VERSION_INT
Definition: version.h:85
AVClass
Describe the class of an AVClass context structure.
Definition: log.h:66
ff_getauxval
unsigned long ff_getauxval(unsigned long type)
Definition: cpu.c:291
NULL
#define NULL
Definition: coverity.c:32
AV_CPU_FLAG_LASX
#define AV_CPU_FLAG_LASX
Definition: cpu.h:82
AV_CPU_FLAG_AVX512ICL
#define AV_CPU_FLAG_AVX512ICL
F/CD/BW/DQ/VL/VNNI/IFMA/VBMI/VBMI2/VPOPCNTDQ/BITALG/GFNI/VAES/VPCLMULQDQ.
Definition: cpu.h:58
av_default_item_name
const char * av_default_item_name(void *ptr)
Return the context name.
Definition: log.c:237
AV_CPU_FLAG_MSA
#define AV_CPU_FLAG_MSA
Definition: cpu.h:78
av_cpu_max_align
size_t av_cpu_max_align(void)
Get the maximum data alignment that may be required by FFmpeg.
Definition: cpu.c:272
ff_get_cpu_flags_aarch64
int ff_get_cpu_flags_aarch64(void)
Definition: cpu.c:127
AV_CPU_FLAG_CMOV
#define AV_CPU_FLAG_CMOV
supports cmov instruction
Definition: cpu.h:52
AV_CPU_FLAG_ALTIVEC
#define AV_CPU_FLAG_ALTIVEC
standard
Definition: cpu.h:61
atomic_load_explicit
#define atomic_load_explicit(object, order)
Definition: stdatomic.h:96
AV_CPU_FLAG_I8MM
#define AV_CPU_FLAG_I8MM
Definition: cpu.h:74
av_cpu_count
int av_cpu_count(void)
Definition: cpu.c:213
AV_CPU_FLAG_SSE2
#define AV_CPU_FLAG_SSE2
PIV SSE2 functions.
Definition: cpu.h:35
AV_CPU_FLAG_SETEND
#define AV_CPU_FLAG_SETEND
Definition: cpu.h:75
AV_CPU_FLAG_AVXSLOW
#define AV_CPU_FLAG_AVXSLOW
AVX supported, but slow when using YMM registers (e.g. Bulldozer)
Definition: cpu.h:49
AV_CPU_FLAG_AVX
#define AV_CPU_FLAG_AVX
AVX functions: requires OS support even if YMM registers aren't used.
Definition: cpu.h:48
AV_CPU_FLAG_FMA4
#define AV_CPU_FLAG_FMA4
Bulldozer FMA4 functions.
Definition: cpu.h:51
cpu.h
AV_CPU_FLAG_AVX2
#define AV_CPU_FLAG_AVX2
AVX2 functions: requires OS support even if YMM registers aren't used.
Definition: cpu.h:53
AV_CPU_FLAG_SSE2SLOW
#define AV_CPU_FLAG_SSE2SLOW
SSE2 supported, but usually not faster.
Definition: cpu.h:36
AV_CPU_FLAG_NEON
#define AV_CPU_FLAG_NEON
Definition: cpu.h:70
AV_CPU_FLAG_FMA3
#define AV_CPU_FLAG_FMA3
Haswell FMA3 functions.
Definition: cpu.h:54
attributes.h
AV_CPU_FLAG_RV_MISALIGNED
#define AV_CPU_FLAG_RV_MISALIGNED
Fast misaligned accesses.
Definition: cpu.h:99
AV_CPU_FLAG_MMX2
#define AV_CPU_FLAG_MMX2
SSE integer functions or AMD MMX ext.
Definition: cpu.h:32
ff_get_cpu_flags_ppc
int ff_get_cpu_flags_ppc(void)
This function MAY rely on signal() or fork() in order to make sure AltiVec is present.
Definition: cpu.c:48
AV_CPU_FLAG_SSE42
#define AV_CPU_FLAG_SSE42
Nehalem SSE4.2 functions.
Definition: cpu.h:46
common.h
AV_CPU_FLAG_RVV_I32
#define AV_CPU_FLAG_RVV_I32
Vectors of 8/16/32-bit int's *‍/.
Definition: cpu.h:90
atomic_store_explicit
#define atomic_store_explicit(object, desired, order)
Definition: stdatomic.h:90
AV_CPU_FLAG_ARMV8
#define AV_CPU_FLAG_ARMV8
Definition: cpu.h:71
len
int len
Definition: vorbis_enc_data.h:426
ff_get_cpu_flags_x86
int ff_get_cpu_flags_x86(void)
Definition: cpu.c:90
get_cpu_flags
static int get_cpu_flags(void)
Definition: cpu.c:59
AV_CPU_FLAG_ATOM
#define AV_CPU_FLAG_ATOM
Atom processor, some SSSE3 instructions are slower.
Definition: cpu.h:44
av_opt_eval_flags
int av_opt_eval_flags(void *obj, const AVOption *o, const char *val, int *flags_out)
ret
ret
Definition: filter_design.txt:187
AVClass::class_name
const char * class_name
The name of the class; usually it is the same name as the context structure type to which the AVClass...
Definition: log.h:71
AV_CPU_FLAG_VFPV3
#define AV_CPU_FLAG_VFPV3
Definition: cpu.h:69
ff_get_cpu_max_align_arm
size_t ff_get_cpu_max_align_arm(void)
Definition: cpu.c:180
AV_CPU_FLAG_ARMV5TE
#define AV_CPU_FLAG_ARMV5TE
Definition: cpu.h:65
AV_CPU_FLAG_MMX
#define AV_CPU_FLAG_MMX
standard MMX
Definition: cpu.h:30
AV_CPU_FLAG_RVI
#define AV_CPU_FLAG_RVI
I (full GPR bank)
Definition: cpu.h:85
AV_CPU_FLAG_AESNI
#define AV_CPU_FLAG_AESNI
Advanced Encryption Standard functions.
Definition: cpu.h:47
atomic_exchange_explicit
#define atomic_exchange_explicit(object, desired, order)
Definition: stdatomic.h:106
AV_CPU_FLAG_SSE
#define AV_CPU_FLAG_SSE
SSE functions.
Definition: cpu.h:34
ff_get_cpu_flags_mips
int ff_get_cpu_flags_mips(void)
Definition: cpu.c:106
AV_CPU_FLAG_MMXEXT
#define AV_CPU_FLAG_MMXEXT
SSE integer functions or AMD MMX ext.
Definition: cpu.h:31
ff_get_cpu_max_align_ppc
size_t ff_get_cpu_max_align_ppc(void)
Definition: cpu.c:155
AV_CPU_FLAG_BMI2
#define AV_CPU_FLAG_BMI2
Bit Manipulation Instruction Set 2.
Definition: cpu.h:56
AV_CPU_FLAG_VFP_VM
#define AV_CPU_FLAG_VFP_VM
VFPv2 vector mode, deprecated in ARMv7-A and unavailable in various CPUs implementations.
Definition: cpu.h:72
AV_CPU_FLAG_MMI
#define AV_CPU_FLAG_MMI
Definition: cpu.h:77
AV_OPT_TYPE_FLAGS
@ AV_OPT_TYPE_FLAGS
Underlying C type is unsigned int.
Definition: opt.h:255
flags
#define flags(name, subs,...)
Definition: cbs_av1.c:482
av_log
#define av_log(a,...)
Definition: tableprint_vlc.h:27
AV_CPU_FLAG_RVV_I64
#define AV_CPU_FLAG_RVV_I64
Vectors of 64-bit int's *‍/.
Definition: cpu.h:92
ff_get_cpu_flags_riscv
int ff_get_cpu_flags_riscv(void)
Definition: cpu.c:48
AV_OPT_TYPE_CONST
@ AV_OPT_TYPE_CONST
Special option type for declaring named constants.
Definition: opt.h:299
AV_CPU_FLAG_ARMV6T2
#define AV_CPU_FLAG_ARMV6T2
Definition: cpu.h:67
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