FFmpeg
cpu.c
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1 /*
2  * This file is part of FFmpeg.
3  *
4  * FFmpeg is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU Lesser General Public
6  * License as published by the Free Software Foundation; either
7  * version 2.1 of the License, or (at your option) any later version.
8  *
9  * FFmpeg is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12  * Lesser General Public License for more details.
13  *
14  * You should have received a copy of the GNU Lesser General Public
15  * License along with FFmpeg; if not, write to the Free Software
16  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
17  */
18 
19 #include <stdio.h>
20 
21 #include "config.h"
22 
23 #include "libavutil/cpu.h"
24 #include "libavutil/avstring.h"
25 
26 #if HAVE_UNISTD_H
27 #include <unistd.h>
28 #endif
29 #if !HAVE_GETOPT
30 #include "compat/getopt.c"
31 #endif
32 
33 static const struct {
34  int flag;
35  const char *name;
36 } cpu_flag_tab[] = {
37 #if ARCH_AARCH64
38  { AV_CPU_FLAG_ARMV8, "armv8" },
39  { AV_CPU_FLAG_NEON, "neon" },
40  { AV_CPU_FLAG_VFP, "vfp" },
41  { AV_CPU_FLAG_DOTPROD, "dotprod" },
42  { AV_CPU_FLAG_I8MM, "i8mm" },
43 #elif ARCH_ARM
44  { AV_CPU_FLAG_ARMV5TE, "armv5te" },
45  { AV_CPU_FLAG_ARMV6, "armv6" },
46  { AV_CPU_FLAG_ARMV6T2, "armv6t2" },
47  { AV_CPU_FLAG_VFP, "vfp" },
48  { AV_CPU_FLAG_VFP_VM, "vfp_vm" },
49  { AV_CPU_FLAG_VFPV3, "vfpv3" },
50  { AV_CPU_FLAG_NEON, "neon" },
51  { AV_CPU_FLAG_SETEND, "setend" },
52 #elif ARCH_PPC
53  { AV_CPU_FLAG_ALTIVEC, "altivec" },
54 #elif ARCH_MIPS
55  { AV_CPU_FLAG_MMI, "mmi" },
56  { AV_CPU_FLAG_MSA, "msa" },
57 #elif ARCH_X86
58  { AV_CPU_FLAG_MMX, "mmx" },
59  { AV_CPU_FLAG_MMXEXT, "mmxext" },
60  { AV_CPU_FLAG_SSE, "sse" },
61  { AV_CPU_FLAG_SSE2, "sse2" },
62  { AV_CPU_FLAG_SSE2SLOW, "sse2slow" },
63  { AV_CPU_FLAG_SSE3, "sse3" },
64  { AV_CPU_FLAG_SSE3SLOW, "sse3slow" },
65  { AV_CPU_FLAG_SSSE3, "ssse3" },
66  { AV_CPU_FLAG_ATOM, "atom" },
67  { AV_CPU_FLAG_SSE4, "sse4.1" },
68  { AV_CPU_FLAG_SSE42, "sse4.2" },
69  { AV_CPU_FLAG_AVX, "avx" },
70  { AV_CPU_FLAG_AVXSLOW, "avxslow" },
71  { AV_CPU_FLAG_XOP, "xop" },
72  { AV_CPU_FLAG_FMA3, "fma3" },
73  { AV_CPU_FLAG_FMA4, "fma4" },
74  { AV_CPU_FLAG_3DNOW, "3dnow" },
75  { AV_CPU_FLAG_3DNOWEXT, "3dnowext" },
76  { AV_CPU_FLAG_CMOV, "cmov" },
77  { AV_CPU_FLAG_AVX2, "avx2" },
78  { AV_CPU_FLAG_BMI1, "bmi1" },
79  { AV_CPU_FLAG_BMI2, "bmi2" },
80  { AV_CPU_FLAG_AESNI, "aesni" },
81  { AV_CPU_FLAG_AVX512, "avx512" },
82  { AV_CPU_FLAG_AVX512ICL, "avx512icl" },
83  { AV_CPU_FLAG_SLOW_GATHER, "slowgather" },
84 #elif ARCH_LOONGARCH
85  { AV_CPU_FLAG_LSX, "lsx" },
86  { AV_CPU_FLAG_LASX, "lasx" },
87 #elif ARCH_RISCV
88  { AV_CPU_FLAG_RVI, "rvi" },
89  { AV_CPU_FLAG_RVF, "rvf" },
90  { AV_CPU_FLAG_RVD, "rvd" },
91  { AV_CPU_FLAG_RVB_ADDR, "zba" },
92  { AV_CPU_FLAG_RVB_BASIC, "zbb" },
93  { AV_CPU_FLAG_RVV_I32, "zve32x" },
94  { AV_CPU_FLAG_RVV_F32, "zve32f" },
95  { AV_CPU_FLAG_RVV_I64, "zve64x" },
96  { AV_CPU_FLAG_RVV_F64, "zve64d" },
97 #endif
98  { 0 }
99 };
100 
101 static void print_cpu_flags(int cpu_flags, const char *type)
102 {
103  int i;
104 
105  printf("cpu_flags(%s) = 0x%08X\n", type, cpu_flags);
106  printf("cpu_flags_str(%s) =", type);
107  for (i = 0; cpu_flag_tab[i].flag; i++)
108  if (cpu_flags & cpu_flag_tab[i].flag)
109  printf(" %s", cpu_flag_tab[i].name);
110  printf("\n");
111 }
112 
113 
114 int main(int argc, char **argv)
115 {
116  int cpu_flags_raw = av_get_cpu_flags();
117  int cpu_flags_eff;
118  int cpu_count = av_cpu_count();
119  const char *threads = "auto";
120  int i;
121 
122  for(i = 0; cpu_flag_tab[i].flag; i++) {
123  unsigned tmp = 0;
124  if (av_parse_cpu_caps(&tmp, cpu_flag_tab[i].name) < 0) {
125  fprintf(stderr, "Table missing %s\n", cpu_flag_tab[i].name);
126  return 4;
127  }
128  }
129 
130  if (cpu_flags_raw < 0)
131  return 1;
132 
133  for (;;) {
134  int c = getopt(argc, argv, "c:t:");
135  if (c == -1)
136  break;
137  switch (c) {
138  case 'c':
139  {
140  unsigned flags = av_get_cpu_flags();
141  if (av_parse_cpu_caps(&flags, optarg) < 0)
142  return 2;
143 
145  break;
146  }
147  case 't':
148  {
149  threads = optarg;
150  }
151  }
152  }
153 
154  cpu_flags_eff = av_get_cpu_flags();
155 
156  if (cpu_flags_eff < 0)
157  return 3;
158 
159  print_cpu_flags(cpu_flags_raw, "raw");
160  print_cpu_flags(cpu_flags_eff, "effective");
161  printf("threads = %s (cpu_count = %d)\n", threads, cpu_count);
162 
163  return 0;
164 }
AV_CPU_FLAG_VFP
#define AV_CPU_FLAG_VFP
Definition: cpu.h:67
av_force_cpu_flags
void av_force_cpu_flags(int arg)
Disables cpu detection and forces the specified flags.
Definition: cpu.c:75
AV_CPU_FLAG_SSE3
#define AV_CPU_FLAG_SSE3
Prescott SSE3 functions.
Definition: cpu.h:38
cpu_count
static atomic_int cpu_count
Definition: cpu.c:53
AV_CPU_FLAG_RVB_BASIC
#define AV_CPU_FLAG_RVB_BASIC
Basic bit-manipulations.
Definition: cpu.h:91
AV_CPU_FLAG_LSX
#define AV_CPU_FLAG_LSX
Definition: cpu.h:80
AV_CPU_FLAG_SSE3SLOW
#define AV_CPU_FLAG_SSE3SLOW
SSE3 supported, but usually not faster.
Definition: cpu.h:39
tmp
static uint8_t tmp[11]
Definition: aes_ctr.c:28
AV_CPU_FLAG_3DNOW
#define AV_CPU_FLAG_3DNOW
AMD 3DNOW.
Definition: cpu.h:32
AV_CPU_FLAG_RVF
#define AV_CPU_FLAG_RVF
F (single precision FP)
Definition: cpu.h:85
AV_CPU_FLAG_DOTPROD
#define AV_CPU_FLAG_DOTPROD
Definition: cpu.h:72
av_get_cpu_flags
int av_get_cpu_flags(void)
Return the flags which specify extensions supported by the CPU.
Definition: cpu.c:103
AV_CPU_FLAG_BMI1
#define AV_CPU_FLAG_BMI1
Bit Manipulation Instruction Set 1.
Definition: cpu.h:54
cpu_flags
static atomic_int cpu_flags
Definition: cpu.c:52
AV_CPU_FLAG_RVV_F64
#define AV_CPU_FLAG_RVV_F64
Vectors of double's.
Definition: cpu.h:90
name
const char * name
Definition: cpu.c:35
AV_CPU_FLAG_SSSE3
#define AV_CPU_FLAG_SSSE3
Conroe SSSE3 functions.
Definition: cpu.h:41
AV_CPU_FLAG_XOP
#define AV_CPU_FLAG_XOP
Bulldozer XOP functions.
Definition: cpu.h:49
av_parse_cpu_caps
int av_parse_cpu_caps(unsigned *flags, const char *s)
Parse CPU caps from a string and update the given AV_CPU_* flags based on that.
Definition: cpu.c:113
AV_CPU_FLAG_3DNOWEXT
#define AV_CPU_FLAG_3DNOWEXT
AMD 3DNowExt.
Definition: cpu.h:37
type
it s the only field you need to keep assuming you have a context There is some magic you don t need to care about around this just let it vf type
Definition: writing_filters.txt:86
AV_CPU_FLAG_RVV_F32
#define AV_CPU_FLAG_RVV_F32
Vectors of float's *‍/.
Definition: cpu.h:88
AV_CPU_FLAG_SLOW_GATHER
#define AV_CPU_FLAG_SLOW_GATHER
CPU has slow gathers.
Definition: cpu.h:58
AV_CPU_FLAG_AVX512
#define AV_CPU_FLAG_AVX512
AVX-512 functions: requires OS support even if YMM/ZMM registers aren't used.
Definition: cpu.h:56
getopt
static int getopt(int argc, char *argv[], char *opts)
Definition: getopt.c:41
AV_CPU_FLAG_ARMV6
#define AV_CPU_FLAG_ARMV6
Definition: cpu.h:65
AV_CPU_FLAG_SSE4
#define AV_CPU_FLAG_SSE4
Penryn SSE4.1 functions.
Definition: cpu.h:44
AV_CPU_FLAG_RVB_ADDR
#define AV_CPU_FLAG_RVB_ADDR
Address bit-manipulations.
Definition: cpu.h:92
print_cpu_flags
static void print_cpu_flags(int cpu_flags, const char *type)
Definition: cpu.c:101
AV_CPU_FLAG_RVD
#define AV_CPU_FLAG_RVD
D (double precision FP)
Definition: cpu.h:86
flag
int flag
Definition: cpu.c:34
AV_CPU_FLAG_LASX
#define AV_CPU_FLAG_LASX
Definition: cpu.h:81
AV_CPU_FLAG_AVX512ICL
#define AV_CPU_FLAG_AVX512ICL
F/CD/BW/DQ/VL/VNNI/IFMA/VBMI/VBMI2/VPOPCNTDQ/BITALG/GFNI/VAES/VPCLMULQDQ.
Definition: cpu.h:57
AV_CPU_FLAG_MSA
#define AV_CPU_FLAG_MSA
Definition: cpu.h:77
AV_CPU_FLAG_CMOV
#define AV_CPU_FLAG_CMOV
supports cmov instruction
Definition: cpu.h:51
AV_CPU_FLAG_ALTIVEC
#define AV_CPU_FLAG_ALTIVEC
standard
Definition: cpu.h:60
c
Undefined Behavior In the C some operations are like signed integer dereferencing freed accessing outside allocated Undefined Behavior must not occur in a C it is not safe even if the output of undefined operations is unused The unsafety may seem nit picking but Optimizing compilers have in fact optimized code on the assumption that no undefined Behavior occurs Optimizing code based on wrong assumptions can and has in some cases lead to effects beyond the output of computations The signed integer overflow problem in speed critical code Code which is highly optimized and works with signed integers sometimes has the problem that often the output of the computation does not c
Definition: undefined.txt:32
AV_CPU_FLAG_I8MM
#define AV_CPU_FLAG_I8MM
Definition: cpu.h:73
av_cpu_count
int av_cpu_count(void)
Definition: cpu.c:209
AV_CPU_FLAG_SSE2
#define AV_CPU_FLAG_SSE2
PIV SSE2 functions.
Definition: cpu.h:34
AV_CPU_FLAG_SETEND
#define AV_CPU_FLAG_SETEND
Definition: cpu.h:74
main
int main(int argc, char **argv)
Definition: cpu.c:114
AV_CPU_FLAG_AVXSLOW
#define AV_CPU_FLAG_AVXSLOW
AVX supported, but slow when using YMM registers (e.g. Bulldozer)
Definition: cpu.h:48
AV_CPU_FLAG_AVX
#define AV_CPU_FLAG_AVX
AVX functions: requires OS support even if YMM registers aren't used.
Definition: cpu.h:47
AV_CPU_FLAG_FMA4
#define AV_CPU_FLAG_FMA4
Bulldozer FMA4 functions.
Definition: cpu.h:50
cpu.h
AV_CPU_FLAG_AVX2
#define AV_CPU_FLAG_AVX2
AVX2 functions: requires OS support even if YMM registers aren't used.
Definition: cpu.h:52
AV_CPU_FLAG_SSE2SLOW
#define AV_CPU_FLAG_SSE2SLOW
SSE2 supported, but usually not faster.
Definition: cpu.h:35
AV_CPU_FLAG_NEON
#define AV_CPU_FLAG_NEON
Definition: cpu.h:69
printf
printf("static const uint8_t my_array[100] = {\n")
cpu_flag_tab
static const struct @400 cpu_flag_tab[]
AV_CPU_FLAG_FMA3
#define AV_CPU_FLAG_FMA3
Haswell FMA3 functions.
Definition: cpu.h:53
i
#define i(width, name, range_min, range_max)
Definition: cbs_h2645.c:256
AV_CPU_FLAG_SSE42
#define AV_CPU_FLAG_SSE42
Nehalem SSE4.2 functions.
Definition: cpu.h:45
AV_CPU_FLAG_RVV_I32
#define AV_CPU_FLAG_RVV_I32
Vectors of 8/16/32-bit int's *‍/.
Definition: cpu.h:87
AV_CPU_FLAG_ARMV8
#define AV_CPU_FLAG_ARMV8
Definition: cpu.h:70
AV_CPU_FLAG_ATOM
#define AV_CPU_FLAG_ATOM
Atom processor, some SSSE3 instructions are slower.
Definition: cpu.h:43
AV_CPU_FLAG_VFPV3
#define AV_CPU_FLAG_VFPV3
Definition: cpu.h:68
getopt.c
AV_CPU_FLAG_ARMV5TE
#define AV_CPU_FLAG_ARMV5TE
Definition: cpu.h:64
AV_CPU_FLAG_MMX
#define AV_CPU_FLAG_MMX
standard MMX
Definition: cpu.h:29
AV_CPU_FLAG_RVI
#define AV_CPU_FLAG_RVI
I (full GPR bank)
Definition: cpu.h:84
AV_CPU_FLAG_AESNI
#define AV_CPU_FLAG_AESNI
Advanced Encryption Standard functions.
Definition: cpu.h:46
AV_CPU_FLAG_SSE
#define AV_CPU_FLAG_SSE
SSE functions.
Definition: cpu.h:33
AV_CPU_FLAG_MMXEXT
#define AV_CPU_FLAG_MMXEXT
SSE integer functions or AMD MMX ext.
Definition: cpu.h:30
optarg
static char * optarg
Definition: getopt.c:39
AV_CPU_FLAG_BMI2
#define AV_CPU_FLAG_BMI2
Bit Manipulation Instruction Set 2.
Definition: cpu.h:55
AV_CPU_FLAG_VFP_VM
#define AV_CPU_FLAG_VFP_VM
VFPv2 vector mode, deprecated in ARMv7-A and unavailable in various CPUs implementations.
Definition: cpu.h:71
AV_CPU_FLAG_MMI
#define AV_CPU_FLAG_MMI
Definition: cpu.h:76
flags
#define flags(name, subs,...)
Definition: cbs_av1.c:474
avstring.h
AV_CPU_FLAG_RVV_I64
#define AV_CPU_FLAG_RVV_I64
Vectors of 64-bit int's *‍/.
Definition: cpu.h:89
AV_CPU_FLAG_ARMV6T2
#define AV_CPU_FLAG_ARMV6T2
Definition: cpu.h:66