51 v4i32 in0, in1, in2, in3, hz0, hz1, hz2, hz3, vt0, vt1, vt2, vt3;
52 v4i32 res0, res1, res2, res3;
54 v16i8 pred0, pred1, pred2, pred3, dest0, dest1;
55 v16i8
mask = { 0, 4, 8, 12, 16, 20, 24, 28, 0, 0, 0, 0, 0, 0, 0, 0 };
58 LD_SH2(input, 8, input0, input1);
70 res0, res1, res2, res3);
72 res0, res1, res2, res3);
73 ADD4(res0, vt0, res1, vt1, res2, vt2, res3, vt3, res0, res1, res2, res3);
79 memset(input, 0, 4 * 4 *
sizeof(*input));
85 v8i16 res0, res1, res2, res3;
87 v16i8 pred0, pred1, pred2, pred3, dest0, dest1;
88 v16i8
mask = { 0, 2, 4, 6, 16, 18, 20, 22, 0, 0, 0, 0, 0, 0, 0, 0 };
90 vec = __msa_fill_h(in_dc[0]);
91 vec = __msa_srari_h(vec, 3);
94 res0, res1, res2, res3);
95 ADD4(res0, vec, res1, vec, res2, vec, res3, vec, res0, res1, res2, res3);
106 int16_t *mb_dq_coeff = &
block[0][0][0];
107 v8i16 input0, input1;
108 v4i32 in0, in1, in2, in3,
a1,
b1,
c1, d1;
109 v4i32 hz0, hz1, hz2, hz3, vt0, vt1, vt2, vt3;
112 LD_SH2(input, 8, input0, input1);
121 ADD4(vt0, 3, vt1, 3, vt2, 3, vt3, 3, vt0, vt1, vt2, vt3);
122 SRA_4V(vt0, vt1, vt2, vt3, 3);
123 mb_dq_coeff[0] = __msa_copy_s_h((v8i16) vt0, 0);
124 mb_dq_coeff[16] = __msa_copy_s_h((v8i16) vt1, 0);
125 mb_dq_coeff[32] = __msa_copy_s_h((v8i16) vt2, 0);
126 mb_dq_coeff[48] = __msa_copy_s_h((v8i16) vt3, 0);
127 mb_dq_coeff[64] = __msa_copy_s_h((v8i16) vt0, 2);
128 mb_dq_coeff[80] = __msa_copy_s_h((v8i16) vt1, 2);
129 mb_dq_coeff[96] = __msa_copy_s_h((v8i16) vt2, 2);
130 mb_dq_coeff[112] = __msa_copy_s_h((v8i16) vt3, 2);
131 mb_dq_coeff[128] = __msa_copy_s_h((v8i16) vt0, 4);
132 mb_dq_coeff[144] = __msa_copy_s_h((v8i16) vt1, 4);
133 mb_dq_coeff[160] = __msa_copy_s_h((v8i16) vt2, 4);
134 mb_dq_coeff[176] = __msa_copy_s_h((v8i16) vt3, 4);
135 mb_dq_coeff[192] = __msa_copy_s_h((v8i16) vt0, 6);
136 mb_dq_coeff[208] = __msa_copy_s_h((v8i16) vt1, 6);
137 mb_dq_coeff[224] = __msa_copy_s_h((v8i16) vt2, 6);
138 mb_dq_coeff[240] = __msa_copy_s_h((v8i16) vt3, 6);
140 memset(input, 0, 4 * 4 *
sizeof(int16_t));
#define ADD4(in0, in1, in2, in3, in4, in5, in6, in7, out0, out1, out2, out3)
#define VP8_IDCT_1D_W(in0, in1, in2, in3, out0, out1, out2, out3)