21 #ifndef AVCODEC_ARM_VP56_ARITH_H 22 #define AVCODEC_ARM_VP56_ARITH_H 32 #if CONFIG_THUMB || defined __clang__ 42 #define vp56_rac_get_prob vp56_rac_get_prob_armv6 53 L(
"ldrcsh %2, [%4], #2 \n")
54 U(
"ldrhcs %2, [%4], #2 \n")
56 "smlabb %0, %5, %6, %0 \n" 59 T(
"lslcs %2, %2, %3 \n")
60 T(
"orrcs %1, %1, %2 \n")
61 A(
"orrcs %1, %1, %2, lsl %3 \n")
62 "subcs %3, %3, #16 \n" 64 "cmp %1, %0, lsl #16 \n" 66 "subge %1, %1, %0, lsl #16 \n" 72 :
"r"(high),
"r"(pr),
"r"(c->
end - 1),
73 "0"(shift),
"1"(code_word)
79 #define vp56_rac_get_prob_branchy vp56_rac_get_prob_branchy_armv6 80 static inline int vp56_rac_get_prob_branchy_armv6(
VP56RangeCoder *
c,
int pr)
91 L(
"ldrcsh %2, [%4], #2 \n")
92 U(
"ldrhcs %2, [%4], #2 \n")
94 "smlabb %0, %5, %6, %0 \n" 97 T(
"lslcs %2, %2, %3 \n")
98 T(
"orrcs %1, %1, %2 \n")
99 A(
"orrcs %1, %1, %2, lsl %3 \n")
100 "subcs %3, %3, #16 \n" 103 :
"=&r"(low),
"+&r"(code_word),
"=&r"(tmp),
105 :
"r"(high),
"r"(pr),
"r"(c->
end - 1),
"0"(shift)
108 if (code_word >= tmp) {
109 c->
high = high - low;
static int shift(int a, int b)
Undefined Behavior In the C some operations are like signed integer dereferencing freed accessing outside allocated Undefined Behavior must not occur in a C it is not safe even if the output of undefined operations is unused The unsafety may seem nit picking but Optimizing compilers have in fact optimized code on the assumption that no undefined Behavior occurs Optimizing code based on wrong assumptions can and has in some cases lead to effects beyond the output of computations The signed integer overflow problem in speed critical code Code which is highly optimized and works with signed integers sometimes has the problem that often the output of the computation does not c
const uint8_t ff_vp56_norm_shift[256]
vp56 specific range coder implementation
#define bit(string, value)
__asm__(".macro parse_r var r\n\t""\\var = -1\n\t"_IFC_REG(0) _IFC_REG(1) _IFC_REG(2) _IFC_REG(3) _IFC_REG(4) _IFC_REG(5) _IFC_REG(6) _IFC_REG(7) _IFC_REG(8) _IFC_REG(9) _IFC_REG(10) _IFC_REG(11) _IFC_REG(12) _IFC_REG(13) _IFC_REG(14) _IFC_REG(15) _IFC_REG(16) _IFC_REG(17) _IFC_REG(18) _IFC_REG(19) _IFC_REG(20) _IFC_REG(21) _IFC_REG(22) _IFC_REG(23) _IFC_REG(24) _IFC_REG(25) _IFC_REG(26) _IFC_REG(27) _IFC_REG(28) _IFC_REG(29) _IFC_REG(30) _IFC_REG(31)".iflt \\var\n\t"".error \"Unable to parse register name \\r\"\n\t"".endif\n\t"".endm")